4571 datasheet(112/126 Pages) RENESAS

112 / 126 page

Rev.1.02

May 25, 2007

Page 112 of 124

REJ03B0179-0102

4571 Group

Skip condition

Detailed description

−−

Transfers the high-order 4 bits of prescaler to register B.

Transfers the low-order 4 bits of prescaler to register A.

−−

Transfers the contents of register B to the high-order 4 bits of prescaler and prescaler reload register RPS.

Transfers the contents of register A to the low-order 4 bits of prescaler and prescaler reload register RPS.

−−

Transfers the high-order 4 bits (T17

−T14) of timer 1 to register B.

Transfers the low-order 4 bits (T13

−T10) of timer 1 to register A.

−−

Transfers the contents of register B to the high-order 4 bits of timer 1 and timer 1 reload register R1L.

Transfers the contents of register A to the low-order 4 bits of timer 1 and timer 1 reload register R1L.

−−

Transfers the contents of register B to the high-order 4 bits (R17

−R14) of reload register R1, and the contents

of register A to the low-order 4 bits (R13

−R10) of reload register R1.

−−

Transfers the high-order 4 bits (T27

−T24) of timer 2 to register B.

Transfers the low-order 4 bits (T23

−T20) of timer 2 to register A.

−−

Transfers the contents of register B to the high-order 4 bits of timer 2 and timer 2 reload register R2L.

Transfers the contents of register A to the low-order 4 bits of timer 2 and timer 2 reload register R2L.

−−

Transfers the high-order 4 bits (T37

−T34) of timer 3 to register B.

Transfers the low-order 4 bits (T33

−T30) of timer 3 to register A.

−−

Transfers the contents of register B to the high-order 4 bits of timer 3 and timer 3 reload register R3L.

Transfers the contents of register A to the low-order 4 bits of timer 3 and timer 3 reload register R3L.

−−

Transfers the contents of register B to the high-order 4 bits of timer 3 reload register R3H.

Transfers the contents of register A to the low-order 4 bits of timer 3 reload register R3H.

−−

Transfers the contents of timer 3 reload register R3L to timer 3.

V12 = 0 : (T1F) = 1

−

When V12 = 0 : Clears (0) to the T1F flag and skips the next instruction when timer 1 interrupt request flag

T1F is “1”. When the T1F flag is “0”, executes the next instruction.

When V12 = 1 : This instruction is equivalent to the NOP instruction.

(V12: bit 2 of interrupt control register V1)

V13 = 0 : (T2F) = 1

−

When V13 = 0 : Clears (0) to the T2F flag and skips the next instruction when timer 2 interrupt request flag

T2F is “1”. When the T2F flag is “0”, executes the next instruction.

When V13 = 1 : This instruction is equivalent to the NOP instruction.

(V13: bit 3 of interrupt control register V1)

V20 = 0 : (T3F) = 1

−

When V20 = 0 : Clears (0) to the T3F flag and skips the next instruction when timer 3 interrupt request flag

T3F is “1”. When the T3F flag is “0”, executes the next instruction.

When V20 = 1 : This instruction is equivalent to the NOP instruction.

(V20: bit 0 of interrupt control register V2)

4571 Datasheet(PDF) 112 Page - Renesas Technology Corp

4571 Datasheet(HTML) 112 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL