AD9632 datasheet(18/20 Pages) AD

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AD9631/AD9632

Data Sheet

Rev. D | Page 18 of 20

ANALOG-TO-DIGITAL CONVERTER (ADC) DRIVER

As ADCs move toward higher speeds with higher resolutions,

there becomes a need for high performance drivers that will not

degrade the analog signal to the converter. It is desirable from a

system’s standpoint that the ADC be the element in the signal

chain that ultimately limits overall distortion. Figure 66 is such

an example.

Figure 66. AD9631 Used as Driver for an ADC Signal Chain

LAYOUT CONSIDERATIONS

The specified high speed performance of the AD9631/AD9632

requires careful attention to board layout and component

selection. Proper RF design techniques and low-pass parasitic

component selection are mandatory.

The PCB should have a ground plane covering all unused

portions of the component side of the board to provide a low

impedance path. Remove the ground plane from the area near

the input pins to reduce stray capacitance.

Use chip capacitors for supply bypassing (see Figure 59 and

Figure 60). Connect one end to the ground plane, and the other

within 1/8 inch of each power pin. Connect an additional large

(0.47 μF to 10 μF) tantalum electrolytic capacitor in parallel,

though not necessarily so close, to supply current for fast, large

signal changes at the output.

The feedback resistor should be located close to the inverting

input pin to keep the stray capacitance at this node to a mini-

mum. Capacitance variations of less than 1 pF at the inverting

input will significantly affect high speed performance.

Use stripline design techniques for long signal traces (greater

than about 1 inch). These should be designed with a

characteristic impedance of 50 Ω or 75 Ω and be properly

terminated at each end.

+5V

–5V

130Ω

140Ω

ANALOG IN

AD9631

ADC

AD9632 Datasheet(PDF) 18 Page - Analog Devices