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PM7344 Datasheet(PDF) 144 Page - PMC-Sierra, Inc |
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PM7344 Datasheet(HTML) 144 Page - PMC-Sierra, Inc |
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144 / 293 page ![]() PM7344 S/UNI-MPH DATA SHEET PMC-950449 ISSUE 6 MULTI-PHY USER NETWORK INTERFACE PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE 128 Registers 02BH, 12BH, 22BH and 32BH: E1-FRMR CRC Error Counter - MSB Bit Type Function Default Bit 7 R OVR 0 Bit 6 R NEWDATA 0 Bit 5 Unused X Bit 4 Unused X Bit 3 Unused X Bit 2 Unused X Bit 1 R CRCE9 X Bit 0 R CRCE8 X These registers contain the most significant two bits of the 10-bit CRC error counter value, updated every second. NEWDATA: The NEWDATA flag bit indicates that the counter register contents have been updated with a new count value accumulated over the last 1 second interval. It is set to logic 1 when the CRC error counter data is transferred into the counter registers, and is reset to logic 0 when this register is read. This bit can be polled to determine the 1 second timing boundary used by the FRMR. OVR: The OVR flag bit indicates that the counter register contents have not been read within the last 1 second interval, and therefore have been over-written. It is set to logic 1 if CRC error counter data is transferred into the counter registers before the previous data has been read out, and is reset to logic 0 when this register is read. This CRC error count is distinct from that of PMON because it is guaranteed to be an accurate count of the number of CRC error in one second; whereas, PMON relies on externally initiated transfers which may not be one second apart. |
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