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PM7367 Datasheet(PDF) 120 Page - PMC-Sierra, Inc |
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PM7367 Datasheet(HTML) 120 Page - PMC-Sierra, Inc |
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120 / 323 page ![]() PM7367 FREEDM-32P32 DATA SHEET PMC-1991499 ISSUE 2 FRAME ENGINE AND DATA LINK MANAGER PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMER’S INTERNAL USE 106 Register 0x040 : GPIC Control Bit Type Function Default Bit 31 to Bit 16 Unused XXXXH Bit 15 Unused X Bit 14 Unused X Bit 13 Unused X Bit 12 R/W RPWTH[4] 0 Bit 11 R/W RPWTH[3] 0 Bit 10 R/W RPWTH[2] 0 Bit 9 R/W RPWTH[1] 0 Bit 8 R/W RPWTH[0] 0 Bit 7 Unused X Bit 6 Unused X Bit 5 Unused X Bit 4 Unused X Bit 3 R/W PONS_E 0 Bit 2 R/W SOE_E 0 Bit 1 R/W LENDIAN 1 Bit 0 R/W Reserved 0 This register configures the operation of the GPIC. Note This register is not byte addressable. Writing to this register modifies all the bits in the register. Byte selection using byte enable signals (CBEB[3:0]) are not implemented. However, when all four byte enables are negated, no access is made to this register. Reserved: The Reserved bit must be set low for correct operation of the FREEDM. |
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