PM8620 datasheet(61/190 Pages) PMC

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NSE-20G™ Standard Product Data Sheet

Preliminary

Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use

Document ID: PMC-2000170, Issue 3

Normal Mode Register Description

Normal mode registers are used to configure and monitor the operation of the NSE. Normal mode

registers (as opposed to test mode registers) are selected when A[11] is set low.

Notes on Normal Mode Register Bits

1. Writing values into unused register bits has no effect. However, to ensure software

compatibility with future, feature-enhanced versions of this product, unused register bits must

be written with logic zero. Reading back unused bits can produce either a logic one or a logic

zero; hence, unused register bits should be masked off by software when read.

2. All configuration bits that can be written into can also be read back. This allows the processor

controlling the TSB to determine the programming state of the block.

3. Writeable normal mode register bits are cleared to logic zero upon reset unless otherwise

noted.

4. Writing into read-only normal mode register bit locations does not affect NSE-20G operation

unless otherwise noted.

5. For registers above 100H, only a one port set of the 32 ports are shown. The Register

addresses are shown for example as: 0100H + N*20H, N here is the port number between 0

and 31. This is done to prevent unnecessary duplication of otherwise identical register sets.

PM8620 Datasheet(PDF) 61 Page - PMC-Sierra, Inc