LT3045 datasheet(38/62 Pages) AD

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Data Sheet

LT3074

analog.com

Rev 0.

38 of 62

BIAS Undervoltage Lockout

An internal undervoltage lockout (UVLO) comparator monitors the BIAS rail. If VBIAS drops below the UVLO threshold,

all functions shut down, the pass transistor is gated off, and output current falls to zero. The typical BIAS pin UVLO

threshold is 2.2V on the rising edge of BIAS. The UVLO circuitry incorporates about 130mV of hysteresis on the falling

edge of BIAS.

EN/UV Function (Turning the Part ON and OFF)

The EN/UV pin is used to put the regulator in a micropower shutdown state (NAP mode). In NAP mode, the BIAS pin

quiescent current drops to less than 10µA.

The LT3074 has an accurate 1.26V turn-on threshold on the EN/UV pin with 80mV hysteresis. This threshold can be

used with a resistor divider from the BIAS supply to define an accurate UVLO threshold for the regulator. The EN/UV

pin current (IEN/UV) at the threshold from Table 1 must be considered when calculating the resistor divider network as

follows:

��(��) = 1.26�� × (1 +

��2

��1

) + (��/�� × ��2)

where:

REN1 and REN2 are the resistors from the EN/UV pin to AGND and the EN/UV pin to the BIAS pin, respectively. IEN/UV can

be ignored if REN1 is less than 100kΩ. If unused, connect the EN/UV pin to BIAS.

Power Good Indicator

The power good (PG) pin is an open-drain NMOS output that indicates the status of the output voltage. The PG pin

becomes high impedance when the output is within its regulation limits and is actively pulled low when one or more

of the following conditions are detected

•

EN/UV pin is pulled below its turn on threshold, forcing the part in NAP mode.

•

BIAS voltage is below its UVLO threshold.

•

Programmable power good comparator detects an output undervoltage fault.

•

OUT over IN voltage detector activates.

Programmable Power Good

In addition to programming the VOUT_UV_WARN_LIMIT through the PMBus, the LT3074 supports an analog method

to set an output undervoltage fault. As illustrated in Figure 81 , the power good threshold is user programmable using

the ratio of two external resistors, RPG2 and RPG1:

��(��_��) = 0.3�� × (1 +

��2

��1

) + (�� × ��2)

If the PGFB pin increases to more than 300mV, the open-drain PG pin deasserts and becomes high impedance. The

power good comparator has 8mV of hysteresis and 10µsec of deglitch. If the power good comparator detects an

output undervoltage fault, in addition to asserting the PG pin low, bit 4 of the STATUS_VOUT register (and as a result

bit 15 of the STATUS_WORD register) is set and the host is notified by asserting the ALERT pin low.

If the programmable power good functionality is not needed, tie the PGFB pin to BIAS and float the PG pin. Do not

float the PGFB pin.

Current Monitor and Programmable Current Limit

The IMON pin of the LT3074 serves as a voltage output proportional to the load current. The scaling factor for the

reported voltage is IOUT/3A such that the IMON pin voltage corresponds to 1V for the full 3A load current. The IMON

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