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LT3045 Datasheet(PDF) 14 Page - Analog Devices

Part # LT3045
Description  5.5V, 3A Ultralow Noise, High PSRR, 45mV Dropout Linear Regulator with PMBus
PDF  62 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

LT3045 Datasheet(HTML) 14 Page - Analog Devices

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Data Sheet
LT3074
analog.com
Rev 0.
14 of 62
connect the pin to AGND to set the address to 110_0000b or to BIASAF to set the
address to 110_1111b. DO NOT FLOAT THIS PIN. See the Applications Information
section for more information.
16
BIASAF
Bias Filter Pin for analog circuity. The LT3074 requires a minimum 2.2µF bypass
capacitor on this pin.
17
BIAS
Bias Supply. This pin supplies current to the internal control circuitry and the output
stage driving the pass transistor. This pin does not require any bypass capacitor. To
ensure proper operation, the BIAS voltage must satisfy the following conditions:
2.375V ≤ VBIAS ≤ 5.5V and VBIAS ≥1.2 + VOUT.
18
BIASDF
Bias Filter Pin for digital circuity. The LT3074 requires a minimum 0.47µF bypass
capacitor on this pin.
19
DGND
Digital Ground. To ensure proper electrical and thermal performance, tie all ground
pins of the package to PCB ground.
20, 21,
Exposed
Pad 23
IN
Input Supply. Pins 20, 21, and exposed pad 23 of the LQFN package are the electrical
connection to IN. These pins supply power to the high current pass transistor. Connect
all IN pins together for proper performance and solder pin 23 to the PCB for better
thermal performance. The LT3074 requires a bypass capacitor at IN to maintain
stability and low input impedance over frequency. A 10µF input bypass capacitor
suffices for most battery and power plane impedances. Minimizing input trace
inductance optimizes performance. Applications that operate with low VIN− VOUT
differential voltage and that have large, fast load transients may require a much higher
input capacitor to prevent the input supply from drooping and allowing the regulator
to enter dropout.
22
EN
Device Enable. This pin enables/disables the output. Pulling the EN pin low pulls down
the reference, disables the output transistor, and disables auxiliary functions. Drive the
EN pin with either a digital logic port, or an open-collector NPN, or an open-drain
NMOS terminated with a pull-up resistor to VBIAS. The pull-up resistor must be less than
200kΩ to meet the VIH condition of the EN pin. If unused, connect the EN pin to BIAS.



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