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LM7480 Datasheet(PDF) 3 Page - Texas Instruments |
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LM7480 Datasheet(HTML) 3 Page - Texas Instruments |
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3 / 43 page  5 Device Comparison Table LM74800 LM74801 Reverse Current Blocking V(A-C) linear regulation and comparator V(A-C) comparator only 6 Pin Configuration and Functions 11 10 9 8 7 2 3 4 5 6 C DGATE A OV VSNS SW GND OUT CAP DRR 1 12 HGATE EN/UVLO VS Exposed Thermal Pad Figure 6-1. DRR Package, 12-Pin WSON (Top View) Table 6-1. Pin Functions PIN TYPE DESCRIPTION NAME LM7480 DRR-12 (WSON) DGATE 1 O Diode Controller Gate Drive Output. Connect to the GATE of the external MOSFET. A 2 I Anode of the ideal diode. Connect to the source of the external MOSFET. VSNS 3 I Voltage sensing input. SW 4 I Voltage sensing disconnect switch terminal. VSNS and SW are internally connected through a switch. Use SW as the top connection of the battery sensing or OV resistor ladder network. When EN/UVLO is pulled low, the switch is OFF disconnecting the resistor ladder from the battery line thereby cutting off the leakage current. If the internal disconnect switch between VSNS and SW is not used then short them together and connect to VS pin. OV 5 I Adjustable overvoltage threshold input. Connect a resistor ladder across SW to OV terminal. When the voltage at OVP exceeds the overvoltage cut-off threshold then the HGATE is pulled low turning OFF the HSFET. HGATE turns ON when the sense voltage goes below the OVP falling threshold. EN/UVLO 6 I EN/UVLO Input. Connect to VS pin for always ON operation. Can be driven externally from a micro controller I/O. Pulling it low below V(ENF) makes the device enter into low Iq shutdown mode. For UVLO, connect an external resistor ladder to EN/UVLO to GND. GND 7 G Connect to the system ground plane. HGATE 8 O GATE driver output for the HSFET. Connect to the GATE of the external FET. OUT 9 I Connect to the output rail (external MOSFET source). VS 10 I Input power supply to the IC. Connect VS to middle point of the common drain back to back MOSFET configuration. Connect a 100-nF capacitor across VS and GND pins. CAP 11 O Charge pump output. Connect a 100-nF capacitor across CAP and VS pins. C 12 I Cathode of the ideal diode. Connect to the drain of the external MOSFET. RTN Thermal Pad — Leave exposed pad floating. Do Not connect to GND plane. www.ti.com LM7480 SNOSDD8 – DECEMBER 2022 Copyright © 2023 Texas Instruments Incorporated Submit Document Feedback 3 Product Folder Links: LM7480 |
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