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GL424 Datasheet(PDF) 9 Page - GENESYS LOGIC |
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GL424 Datasheet(HTML) 9 Page - GENESYS LOGIC |
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9 / 34 page ![]() GL424 SD/MMC Flash Card Controller ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 9 CHAPTER 2 FEATURES 2.1 SD Host Interface ‧ Complies with SD Specification, Version 2.0 ‧ Complies with SD Specification, Version 1.1 ‧ Complies with SD Specification, Version 1.0 ‧ Supports SPI mode and CPRM functions ‧ Supports clock rate up to 25 MHz for SD1.0 ‧ Supports clock rate up to 52 MHz for SD1.1 and SD2.0 ‧ Buffers for multi-block flash memory programming ‧ DMA operation between buffers and flash memory ‧ Supports automatic CRC16 generation and verification on DATA3-0 ‧ Supports SD card exceed 4Gbytes capacity 2.2 MMC Host Interface ‧ Complies with MultiMediaCard System Specification, Version 4.0 ‧ Complies with MultiMediaCard System Specification, Version 3.3 ‧ Supports SPI mode and CPRM functions ‧ Supports clock rate up to 20 MHz for MMC3.3 ‧ Supports clock rate up to 52 MHz for MMC4.0 ‧ Buffers for multi-block flash memory programming ‧ DMA operation between buffers and flash memory ‧ Supports automatic CRC16 generation and verification on DATA7-0 2.3 Flash Memory Interface ‧ Direct interface to NAND/AND flash chips (SAMSUNG / TOSHIBA / HITACHI / RENESAS / MICRON / ST / HYNIX) ‧ Supports dual-channel, 16 bits flash (VFBGA54 package and die) ‧ Drives up to 4 flash memory chips, respectively (VFBGA54 package and die) ‧ Supports 64M / 128M / 256M / 512M / 1G / 2G / 4G / 8G bits flash chips ‧ Embedded firmware support for flash file system (FTL) ‧ Built-in flash management algorithm ‧ Powerful ECC for error detection and correction up to 6 bytes per 512bytes |
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