GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller

©2000-2007 Genesys Logic Inc. - All rights reserved.

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CHAPTER 5

FUNCTIONAL DESCRIPTION

UTMI

The USB 2.0 Transceiver Macrocell, it’s the analog circuitry that handles the low level USB protocol and

signaling, and shifts the clock domain of the data from the USB 2.0 rate to one that is compatible with the

general logic.

SIE

The Serial Interface Engine, which contains the USB PID and address recognition logic, and other sequencing

and state machine logic to handle USB packets and transactions.

EPFIFO

Endpoint FIFO includes Control FIFO (FIFO0), interrupt FIFO (FIFO3), Bulk In/Out FIFO (BULKFIFO)

Control FIFO

FIFO of control endpoint 0.

It is 64-byte FIFO, and it is used for endpoint 0 data transfer.

Interrupt FIFO

64-byte depth FIFO of endpoint 3 for status interrupt

Bulk In/Out FIFO It can be in the TX mode or RX mode:

1. It contains ping-pong FIFO (512 bytes each bank) for transmit/receive data continuously.

2. It can be directly accessed by Uc

3. Support automatic hardware SmartMedia ECC error correction

MHE

It contains 5 MIF (Media Interface)

MIFs

1. CF/Micro Drive MIF

2. SmartMedia/xD/Flash MIF

3. SD/MMC MIF

4. MemoryStick MIF

5. MemoryStick PRO MIF

8051 Core/SRAM/LUT/Mask ROM

An 8-bit Micro-controller to manage card operation, card power, USB Storage Class, data transfer between

USB and card interface, and GPIOs control