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GL819 Datasheet(PDF) 24 Page - GENESYS LOGIC

Part # GL819
Description  USB 2.0 Generation 3 Multi-I/F Card Reader Controller
PDF  34 Pages
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Manufacturer  GENESYS [GENESYS LOGIC]
Direct Link  http://www.genesyslogic.com
Logo GENESYS - GENESYS LOGIC

GL819 Datasheet(HTML) 24 Page - GENESYS LOGIC

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GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller
©2000-2007 Genesys Logic Inc. - All rights reserved.
Page 24
AC Characteristics of Smart Media Interface (CLOAD = 30 pF)
SYMBOL
PARAMETER
MIN.
MAX.
UNIT
tCLS
CLE Setup Time
35
-
ns
tCLH
CLE Hold Time
45
-
ns
tCS
-CE Setup Time
160
-
ns
tCH
-CE Hold Time
160
-
ns
tWP
-WE Pulse Width
50
-
ns
tALS
ALE Setup Time
35
-
ns
tALH
ALE Hold Time
79
-
ns
tDS
Data Setup Time
48
-
ns
tDH
Data Hold Time
35
-
ns
tWC
Write Cycle Time
83
-
ns
tWH
-WE High Hold Time
33
-
ns
tWW
-WP High to –WE Low
199
-
ns
tRR
Ready to –RE Low
216
-
ns
tRP
Read Pulse Width
67
-
ns
tRC
Read cycle Time
100
-
ns
tREA
-RE Access Time (Serial Data Access)
-
25
ns
tCEH
-CE High Hold Time (At the Last Serial Read)
400
-
ns
tREAID
-RE Access Time (ID Read)
-
25
ns
tRHZ
-RE High to Output Hi-Z
10
15
ns
tCHZ
-CE High to Output Hi-Z
-
10
ns
tREH
-RE High Hold Time
30
-
ns
tRSTO
-RE Access Time
-
42
ns
tCSTO
-CE Access Time
-
42
ns
tRHW
-RE High to -WE Low
36
-
ns
tWHC
-WE High to –CE Low
160
-
ns
tWHR
-WE High to –RE Low
83
-
ns
tAR1
ALE Low to –RE Low (Address Register Read, ID Read)
330
-
ns
tCR
-CE Low to –RE Low (Data Register Read, ID Read)
235
-
ns
tWB
-WE High to Busy
-
100
ns
tAR2
ALE Low to RE Low (Read Cycle)
330
ns
tRB
Last –RE High to Busy (at Sequential Read)
-
32
ns
tCRY
-CE High to Ready
-
1
µs



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