KING BILLION ELECTRONICS CO., LTD

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HF88S05

SRAM Series

December 18, 2003

2

V1.00

This specification is subject to change without notice. Please contact sales person for the latest version before use.

1. General Description

The HF88S05 is a command mode SRAM device. It features dual (parallel and serial) command access

modes. Multiple device arrays can be accessed with only minimal additional device select pin. Simple

Exclusive OR checksum provides error detection during data transfer between MCU and the device. The

interface logic and protocol include setting up the starting address for data transfer, writing data into

RAM, as well as read it back for verification, and error checking by Exclusive OR checksum. It can be

used for Read/Write memory extension for all KB’s MCUs.

Chip Select pins allows array of HF88S05 devices are used simultaneously for both parallel and serial

transfer mode. In the serial mode, the HF88S05 is connected in daisy chain configuration to minimize

the I/O pins required to use multi-chip array, while in parallel mode, the devices share most of the control

pins and data bus except the chip select pins.

2. Features

Dual (parallel and serial) command access modes.

Address automatically increment with each Read/Write data access.

Exclusive or checksum error detection

Multiple chip array is allowed with easy addressing logic

Read access voltage range 2.7V ~ 3.6V

Organization -- Memory Cell Array: 64K × 8

Package – Dice form