LT8418 datasheet(13/50 Pages) AD

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Data Sheet

LTC7892

analog.com

Rev. 0

13 of 50

FET gate to adjust the gate falling slew rate. BGDN1 also serves as the Kelvin sense of

the bottom FET gate during turn-on.

BOOST1

Bootstrapped Supply to the Top Side Floating Driver for Channel 1. Connect a

capacitor between the BOOST1 and SW1 pins. An internal switch provides power to the

BOOST1 pin from DRVCC when the bottom FET turns on. The voltage swing at the

BOOST1 pin is from DRVCC to (VOUT1 + DRVCC).

SW1

Switch Node Connection to Inductor for Channel 1.

TGDN1

High Current Gate Driver Pull-Down for Top FET for Channel 1. TGDN1 pulls down to

SW. Tie TGDN1 directly to the top FET gate for maximum gate drive transition speed on

the gate falling edge. A resistor can be tied between TGDN1 and the top FET gate to

adjust the gate falling slew rate.

TGUP1

High Current Gate Driver Pull-Up for Top FET for Channel 1. TGUP1 pulls up to BOOST1.

Tie TGUP1 directly to the top FET gate for maximum gate drive transition speed on the

gate rising edge. A resistor can be tied between TGUP1 and the top FET gate to adjust

the gate rising slew rate.

PGOOD1

Power Good Open Drain Logic Output for Channel 1. PGOOD1 is pulled to ground when

the voltage on VFB1 is not within ±10% of its set point.

VPRG1

Output Voltage Control Pin for Channel 1. VPRG1 sets the adjustable output mode for

Channel 1 using external feedback resistors or fixed 28V/24V output mode. Floating

VPRG1 programs the output from 1.2V to 100V with an external resistor divider,

regulating VFB1 to 1.2V. Connect VPRG1 to INTVCC or GND to program the output to 28V

or 24V, respectively, through an internal resistor divider on VFB1.

SS1

External Soft Start Input for Channel 1. SS1 regulates the VFB1 voltage to the lesser of

1.2V or the voltage on the SS1 pin. An internal 12μA pull-up current source is

connected to SS1. A capacitor to GND at SS1 sets the ramp time to the final regulated

output voltage. The ramp time is equal to 1ms for every 10nF of capacitance.

ITH1

Error Amplifier Output and Switching Regulator Compensation Point for Channel 1.

The current comparator trip point increases with this control voltage.

VFB1

Error Amplifier Feedback Input for Channel 1. If the VPRG1 pin is floating, VFB1 receives

the remotely sensed feedback voltage for Channel 1 from an external resistive divider

across the output. If VPRG1 is tied to INTVCC or GND, the VFB1 pin receives the remotely

sensed output voltage directly.

SENSE1-

Negative Input to the Differential Current Comparator for Channel 1. The ITH1 pin

voltage and controlled offset between the SENSE1+ and SENSE1- pins, in conjunction

with the current sense resistor (RSENSE), set the current trip threshold.

SENSE1+

Positive Input to the Differential Current Comparator for Channel 1. The SENSE1+ pin

supplies current to the current comparator for Channel 1 when SENSE1+ is greater than

INTVCC.

GND

(Exposed

Pad)

Ground (Exposed Pad). The exposed pad must be soldered to PCB ground for rated

electrical and thermal performance.

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