LT8418 datasheet(20/50 Pages) AD

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Data Sheet

LTC7892

analog.com

Rev. 0

20 of 50

THEORY OF OPERATION

Main Control Loop

The LTC7892 is a dual synchronous boost controller utilizing a constant frequency, peak current mode architecture.

The two controller channels operate 180° out of phase, which reduces the required input capacitance and power

supply-induced noise. During normal operation, the external bottom FET turns on when the clock sets the set/reset

(SR) latch, causing the inductor current to increase. The main switch is turned off when the main current comparator,

ICMP, resets the SR latch. After the bottom FET is turned off each cycle, the top FET is turned on, which causes the

inductor current to decrease until either the inductor current starts to reverse, as indicated by the current

comparator IR, or the beginning of the next clock cycle.

The peak inductor current at which ICMP trips and resets the latch is controlled by the voltage on the ITHx pin, which

is the output of the error amplifier. The error amplifier compares the output voltage feedback signal at the VFBx pin,

(which is generated with an external resistor divider connected across the output voltage, VOUTx, to GND) to the

internal 1.2V reference voltage. When the load current increases, it causes a slight decrease in VFBx relative to the

reference, which causes the error amplifier to increase the ITHx voltage until the average inductor current matches

the new load current.

Power and Bias Supplies (V

BIAS, EXTVCC, DRVCC, INTVCC)

The INTVCC pin supplies power for the top and bottom FET drivers and most of the internal circuitry. The supply for

the FET drivers is derived from the DRVCC pin, which must be tied to the INTVCCpin to supply power to the gate drivers.

LDOs (low dropout linear regulators) are available from the VBIAS and EXTVCC pins to provide power to INTVCC, which

can be programmed from 4V to 5.5V through control of the DRVSET pin. When the EXTVCC pin is tied to a voltage less

than its switchover voltage, the VBIAS LDO supplies power to INTVCC. If EXTVCCis taken more than its switchover voltage,

the VBIAS LDO regulator turns off, and the EXTVCC LDO is turned on. When enabled, the EXTVCC LDO regulator supplies

power to INTVCC. Using the EXTVCC pin allows the INTVCC power to be derived from a high-efficiency external source.

High Side Bootstrap Capacitor

Each top FET driver is biased from the floating bootstrap capacitor CB, which normally recharges through an internal

switch between BOOSTx and DRVCC whenever the bottom FET turns on. The internal switch becomes high impedance

whenever the bottom FET is off, which prevents the bootstrap capacitor from overcharging if SWx rings less than

GND during the dead times.

If the input voltage increases to a voltage close to a voltage close to its output, the loop can enter dropout and

attempt to turn on the top FET continuously. If the bottom FET is not turned on frequently enough to recharge the

bootstrap capacitor, the top FET may not be fully enhanced, or it may even be completely off when the controller

attempts to turn on the top FET.

LT8418 Datasheet(PDF) 20 Page - Analog Devices