BMP581 datasheet(4/75 Pages) BOSCH

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Bosch Sensortec | BST-BMP581-DS004-11

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Document number: BST-BMP581-DS004-11

as well as in the event of applications for industrial property rights

4.8 NVM Programmability .........................................................................................................................................29

4.8.1

NVM User Range....................................................................................................................................29

4.9 Final test result ....................................................................................................................................................30

5 Digital Interface ...........................................................................................................................................................31

5.1 Protocol Selection................................................................................................................................................31

5.2 Interface timing....................................................................................................................................................31

5.2.1

Interface timing .......................................................................................................................................32

5.2.2

I2C timing specifications.........................................................................................................................33

5.2.3

I3C timing specifications.........................................................................................................................33

5.3 Pad drive stength.................................................................................................................................................34

5.4 Read burst address increment ............................................................................................................................36

5.5 SPI Protocol.........................................................................................................................................................36

5.5.1

SPI3 Wire Mode......................................................................................................................................36

5.5.2

SPI Write Operation................................................................................................................................36

5.5.3

SPI read operation..................................................................................................................................37

5.5.4

SPI hybrid bursts ....................................................................................................................................38

5.6 I²C protocol..........................................................................................................................................................38

5.6.1

I²C write operation ..................................................................................................................................39

5.6.2

I²C read operation...................................................................................................................................40

5.7 I3C Protocol.........................................................................................................................................................42

5.7.1

I3C Identifiers..........................................................................................................................................42

5.7.2

I3C In-band Interrupts.............................................................................................................................42

5.7.3

Common Command Codes (CCC).........................................................................................................44

5.7.4

I3C SDR Operations...............................................................................................................................45

5.7.5

S0/S1 error recovery...............................................................................................................................45

6 Pin out and connection diagrams .............................................................................................................................46

6.1 Pin Out.................................................................................................................................................................46

6.2 Connection Diagrams..........................................................................................................................................46

6.2.1

SPI 3-wire ...............................................................................................................................................47

6.2.2

SPI 4-wire ...............................................................................................................................................47

6.2.3

I²C ...........................................................................................................................................................48

6.2.4

I3C ..........................................................................................................................................................48

6.2.5

SPI/I²C/I3C Configuration with VDD, VDDIO ramp-up time <10 μs .......................................................49

7 Register Map................................................................................................................................................................50

7.1 Register (0x01) ASIC identification ID.................................................................................................................51

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