ADAQ4216BBCZ datasheet(52/63 Pages) AD

52 / 63 page

Data Sheet

ADAQ4216

LAYOUT GUIDELINES

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Rev. A | 52 of 63

The following layout guidelines are recommended to achieve maxi-

mum performance of the ADAQ4216:

►

The ADAQ4216 contains internal 1μF bypass capacitors for

VDD_5V and VDD_1.8V, and VIO contains an internal 0.2μF

capacitor, so no external bypass capacitors are required. This

saves board space, bill of materials count, and reduces layout

sensitivity.

►

It is recommended to have all the analog signals flow in from the

left side of the ADAQ4216 and all the digital signals to flow in

and out from the right side of the ADAQ4216 because this helps

isolate analog signals from digital signals.

►

Use a solid ground plane under the ADAQ4216 and connect all

the analog ground (GND) pins and digital ground (IOGND) pins

to the shared ground plane to avoid formation of ground loops.

►

Traces routed to the REFIN pin must be isolated and shielded

from other signals. Avoid routing signals beneath the reference

trace (REFIN). If a noise reduction filter is placed between the

output of the reference (or buffer) and the chosen reference

input, it must be placed as close as possible to the ADAQ4216.

ADAQ4216BBCZ Datasheet(PDF) 52 Page - Analog Devices