ADAQ4216BBCZ datasheet(14/63 Pages) AD

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Data Sheet

ADAQ4216

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

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Rev. A | 14 of 63

Figure 11. Pin Configuration

Table 11. Pin Function Descriptions

Pin Number

Mnemonic

Type1

Description

A1 to A4, A7 to A11, A17, B1

to B11, B17, C2, C5, C8 to

C11, C17, D2 to D10, D13 to

D14, E1 to E2, E5, E7 to E8,

E11, E13 to E14, F1 to F5, F7

to F8, F11 to F14, G1 to G2,

G5 to G6, G8 to G10, G13 to

G14, H1 to H6, H8 to H10,

H13 to H14, J1 to J2, J5, J7 to

J9, J11 to J14, K1 to K5, K7 to

K9, K11, K13 to K14, L1 to L6,

L9 to L11, L13

GND

Power Supply Ground.

A5 to A6, J3 to J4

VDDH

PGIA Positive Power Supply. This pin has a 0.1μF bypass capacitor inside the package.

C1, D1

INP

Positive Analog Input. Do not leave the INP pin floating. Leaving the INP pin floating can cause the PGIA

to draw a larger current from the VDDH and VSSH supply.

C3 to C4, G3 to G4

VSSH

PGIA Negative Power Supply. This pin has a 0.1μF bypass capacitor inside the package.

C6 to C7

INN

Negative Analog Input. Do not leave the INN pin floating. Leaving the INN pin floating can cause the

PGIA to draw a larger current from the VDDH and VSSH supply.

D11

REFIN

Reference Input. Drive REFIN with 4.096V to 5V (referred to ground). This pin is the input of the internal

reference buffer and has a 2μF bypass capacitor at the output of the buffer.

D12, E12

VDD_5V

5V Power Supply. The range of VDD_5V depends on the reference value, 5.3V to 5.5V for a 5V

reference, and 4.75V to 5.25V for a 4.096V reference. This pin has a 1μF and 0.1μF bypass capacitors

inside the package.

D15

CNV

Convert Input. A rising edge on this input powers up the device and initiates a new conversion. This

signal must have low jitter to achieve the specified performance of the ADC. Logic levels are determined

by the VIO pin.

D16

RSTB

Reset Input (Active Low). Asynchronous ADC reset.

ADAQ4216BBCZ Datasheet(PDF) 14 Page - Analog Devices

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