BMP585 datasheet(31/71 Pages) BOSCH

31 / 71 page

Bosch Sensortec

| BST-BMP585-DS003-02

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Document number: BST-BMP585-DS003-02

as well as in the event of applications for industrial property rights

5.2.1 Interface timing

The timing diagram for SPI is given in Figure 7 and is valid for all SPI configurations. The corresponding values are given

in Table 17.

Figure 7: SPI timing diagram (SPI4, Mode 0)

Table 17: SPI timings

Parameter

Comment

Symbol

Unit

Target value

min

typ

max

CSB lag time

T_hold_csb

SDX setup

time

T_setup_sdx

SDX hold time

T_hold_sdx

SCL to SDO

turnaround

time

90%/10% Master rise/fall time

= [2, 10]ns @ Cbus = 40pF,

drive_strength = 7

T_delay_scl2sdo_1p2

52.5

90%/10% Master rise/fall time

= [2, 10]ns @ Cbus = 80pF,

drive_strength = 7

T_delay_scl2sdo_1p8

27.8

90%/10% Master rise/fall time

= [2, 10]ns @ Cbus = 80pF,

drive_strength = 6

T_delay_scl2sdo_3p3

20.2

SDO rise/fall

time (90%/

10%)

@ VDDIO = 1.2V

tbd

@ VDDIO = 1.8V/3.3V

SCX

frequency

@ VDDIO = 1.8 V/3.3 V

F_sck,nv

MHz

SCX Pulse

High Time

5% duty cycle variation

T_high_scx

37.5

SCX Pulse

Low Time

T_low_scx

37.5

Idle time after

write access

T_wr_idle, spi

Idle time after

read access

T_rd_idle,spi

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