Bosch Sensortec

| BST-BMP585-DS003-02

4 | 71

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Document number: BST-BMP585-DS003-02

as well as in the event of applications for industrial property rights

7 Register Map ............................................................................................................................................................... 49

8 Register content.......................................................................................................................................................... 50

8.1 Register (0x01) ASIC identification ID................................................................................................................. 50

8.2 Register (0x02) ASIC revision ID ........................................................................................................................ 50

8.3 Register (0x11) ASIC status register................................................................................................................... 50

8.4 Register (0x13) Configure host interface related settings (NVM-backed) .......................................................... 50

8.5 Register (0x14) Interrupt configuration register .................................................................................................. 51

8.6 Register (0x15) INT source selection.................................................................................................................. 52

8.7 Register (0x16) FIFO configuration..................................................................................................................... 52

8.8 Register (0x17) Number of frames in FIFO......................................................................................................... 53

8.9 Register (0x18) FIFO selection configuration ..................................................................................................... 53

8.10 Register (0x1C) Reserved................................................................................................................................... 53

8.11 Register (0x1D) Temperature XLSB ................................................................................................................... 53

8.12 Register (0x1E) Temperature LSB ...................................................................................................................... 53

8.13 Register (0x1F) Temperature MSB ..................................................................................................................... 54

8.14 Register (0x20) Pressure XLSB.......................................................................................................................... 54

8.15 Register (0x21) Pressure LSB ............................................................................................................................ 54

8.16 Register (0x22) Pressure MSB ........................................................................................................................... 54

8.17 Register (0x23) Reserved ................................................................................................................................... 54

8.18 Register (0x24) Reserved ................................................................................................................................... 54

8.19 Register (0x25) Reserved ................................................................................................................................... 55

8.20 Register (0x26) Reserved ................................................................................................................................... 55

8.21 Register (0x27) Interrupt status register (clear-on-read). ................................................................................... 55

8.22 Register (0x28) Status register ........................................................................................................................... 55

8.23 Register (0x29) FIFO output port........................................................................................................................ 56

8.24 Register (0x2B) NVM address ............................................................................................................................ 56

8.25 Register (0x2C) NVM data (LSB)........................................................................................................................ 56

8.26 Register (0x2D) NVM data (MSB)....................................................................................................................... 56

8.27 Register (0x30) DSP configuration...................................................................................................................... 57

8.28 Register (0x31) DSP IIR configuration................................................................................................................ 57

8.29 Register (0x32) Out-of-range (OOR) threshold for pressure (LSB).................................................................... 58