22

AT42QT1060 [DATASHEET]

9505H–AT42–04/2015

5.17

Address 27: Detection Mask

I/O0 – 6 (Detection Mask): these bits control which I/Os that are configured as outputs will be controlled by their

corresponding capacitive key. A 1 means the output n generates an active output when key n is detecting a touch. A

0 means that the output is controlled by the output buffer. See Section 5.24 on page 24 for I/O register precedence

and example usage.

Default:

0x3F (all I/Os are controlled by key status)

5.18

Address 28: Active Level Mask

I/O0 – 6 (Active Level Mask): these bits control the active logic level for the I/Os that are configured as outputs. A 1

means the output generates an active high output, a 0 means that the output is active low. See Section 5.24 for I/O

register precedence and example usage.

Default: 0 (all I/Os are active low output)

5.19

Address 29: User Output Buffer

I/O0 – 6 (User Output Buffer): these bits control the output level for the I/Os that are configured as outputs. A 1

means the output generates an active output, a 0 means that the output is inactive. See Section 5.24 on page 24 for

I/O register precedence and example usage.

Default: 0 (all I/Os inactive)

Table 5-17. Detection Mask

Address

b7

b6

b5

b4

b3

b2

b1

b0

27

Reserved

I/O6

I/O5

I/O4

I/O3

I/O2

I/O1

I/O0

Table 5-18. Active Level Mask

Address

b7

b6

b5

b4

b3

b2

b1

b0

28

Reserved

I/O6

I/O5

I/O4

I/O3

I/O2

I/O1

I/O0

Table 5-19. User Output Buffer

Address

b7

b6

b5

b4

b3

b2

b1

b0

29

Reserved

I/O6

I/O5

I/O4

I/O3

I/O2

I/O1

I/O0