23

AT42QT1060 [DATASHEET]

9505H–AT42–04/2015

5.20

Address 30: Detection Integrator

DETECTION INTEGRATOR: this 8-bit value controls the number of consecutive measurements that must be

confirmed as having passed the key threshold before that key is registered as being in detect. A value of zero should

not be used.

Default: 3

5.21

Address 31: PWM Level

PWM LEVEL: this 8-bit value controls the duty cycle of the PWM output signal. Valid values are between 0...255.

There is a constant level band at either end of the range, so:



A value of 0...10 gives a 100% low output



A value of 250...255 gives a 100% high output

Default: 128 (50:50 duty cycle)

5.22

Address 40 – 51: Key Signal

KEY SIGNAL: addresses 40 – 51 allow key signals to be read for each key, starting with key 0. There are two bytes

of data for each key. These are the key’s 16-bit key signals which are accessed as two 8-bit bytes, stored LSB first.

These addresses are read-only.

Table 5-20. Detection Integrator

Address

b7

b6

b5

b4

b3

b2

b1

b0

30

MSB

DETECTION INTEGRATOR

LSB

Table 5-21. PWM Level

Address

b7

b6

b5

b4

b3

b2

b1

b0

31

MSB

PWM LEVEL

LSB

Table 5-22. Key Signal

Address

b7

b6

b5

b4

b3

b2

b1

b0

40

LSB OF KEY SIGNAL FOR KEY 0

41

MSB OF KEY SIGNAL FOR KEY 0

42–51

LSB/MSB OF KEY SIGNAL FOR KEYS 1 – 5