Channel 1

LI_0

SOA_0

SOB_0

SIA_0

SIB_0

MUX_S0

Channel 0

LO_0

ENL_0

ENA_0

ENB_0

Mux Buffer

Switch

Fabric A

Switch

Fabric B

FPGA

or

ASIC

DS08MB200

www.ti.com

SNLS197D – MAY 2006 – REVISED MARCH 2013

DS08MB200 Dual 800 Mbps 2:1/1:2 LVDS Mux/Buffer

Check for Samples: DS08MB200

1

FEATURES

DESCRIPTION

The DS08MB200 is a dual-port 1 to 2 repeater/buffer

2

•

Up to 800 Mbps Data Rate per Channel

and 2 to 1 multiplexer. High-speed data paths and

•

LVDS/BLVDS/CML/LVPECL Compatible Inputs,

flow-through pinout minimize internal device jitter and

LVDS Compatible Outputs

simplify board layout. The differential inputs and

•

Low Output Skew and Jitter

outputs interface to LVDS or Bus LVDS signals such

as those on TI's 10-, 16-, and 18- bit Bus LVDS

•

On-Chip 100

Ω Input Termination

SerDes, or to CML or LVPECL signals.

•

15 kV ESD Protection on LVDS Inputs/Outputs

The 3.3V supply, CMOS process, and robust I/O

•

Hot Plug Protection

ensure high performance at low power over the entire

•

Single 3.3V Supply

industrial -40 to +85°C temperature range.

•

Industrial -40 to +85°C Temperature Range

•

48-pin WQFN Package

Typical Application

Block Diagram

Figure 1. DS08MB200 Block Diagram

1

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2

All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Copyright © 2006–2013, Texas Instruments Incorporated

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.