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TLE5010

Data Communication via SSC

Draft

Preliminary Data Sheet

V 0.9, 2007-05

Data Communication via SSC

• The data transmission order is ’MSB first’.

• Data is put on the data line with the rising edge on SCK and read with the falling edge

on SCK.

• The SSC interface is byte aligned. Functions are activated after each transmitted byte.

• A “high” condition on the negated chip select pin (CS) of the selected TLE5010

interrupts the transfer immediately. The CRC calculator is automatically resetted.

• Every access to the TLE5010 with ND (number of data)

≥ 1 is done with address auto

increment.

• After an auto-increment overflow the addresses are beginning from 00H again.

• For every data transfer with ND

≥ 1 a 8 bit CRC byte will be appended by the selected

TLE5010. No CRC byte is sent in a data transfer with ND = 0 (e.g. Update Command).

• After the CRC byte is sent, the bit represented by S_NO is pulled low by the selected

slave in the Slave-Active-Byte (bits [3..0], low nibble). In this way, also broadcast-

messages produce an individual feedback of every selected slave. This is necessary

to differentiate the individual TLE5010 slave response, because the CRC byte is

written by both TLE5010 in parallel.

• If the CRC byte on the bus is the same as the internal generated CRC of each

TLE5010, each slave pulls low the dedicated bit in the Slave-Active-Byte (bits [7..4],

high nibble). If not, the bit in the high nibble remains ’1’.

• A write command to address 00H with ND = 0 will update all values inside the

TLE5010, and only in this case the transfer can proceed. Furthermore this command

is add to the CRC-calculation of the following SSC Transfer.

• A command of “0000_0000” is called ’Update Command’.

This command transfers the present immediate values of each register to the update

• After the CRC and Slave-Active byte have been sent the transfer ends.

The TLE5010 always sends logical “1” and all following sent bits from the SSC Master

are ignored (TLE5010 is in idle mode). To enable data transfers again the chip select

pin (CS) of the TLE5010 has to be deselected for CSoff (see Table 13) once.

• If the update mode is selected (CTRL register, UR = ’1’), all accesses are done to

update registers where update registers are present. Other registers are accessed

directly.

TLE5010 Datasheet(PDF) 42 Page - Infineon Technologies AG