| Electronic Components Datasheet Search |
|
SMBP2501BPB Datasheet(PDF) 74 Page - SONiX Technology Company |
|
|
|||||||||||||||||||||||||||||
SMBP2501BPB Datasheet(HTML) 74 Page - SONiX Technology Company |
|
74 / 107 page ![]() SN8P2501B 8-Bit Micro-Controller SONiX TECHNOLOGY CO., LTD Page 74 Version 2.1 8 8 8 TIMERS 8.1 WATCHDOG TIMER The watchdog timer (WDT) is a binary up counter designed for monitoring program execution. If the program goes into the unknown status by noise interference, WDT overflow signal raises and resets MCU. Watchdog clock controlled by code option and the clock source is internal low-speed oscillator (16KHz @3V, 32KHz @5V). Watchdog overflow time = 8192 / Internal Low-Speed oscillator (sec). VDD Internal Low RC Freq. Watchdog Overflow Time 3V 16KHz 512ms 5V 32KHz 256ms Note: If watchdog is “Always_On” mode, it keeps running event under power down mode or green mode. Watchdog clear is controlled by WDTR register. Moving 0x5A data into WDTR is to reset watchdog timer. 0CCH Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 WDTR WDTR7 WDTR6 WDTR5 WDTR4 WDTR3 WDTR2 WDTR1 WDTR0 Read/Write W W W W W W W W After reset 0 0 0 0 0 0 0 0 Example: An operation of watchdog timer is as following. To clear the watchdog timer counter in the top of the main routine of the program. Main: MOV A,#5AH ; Clear the watchdog timer. B0MOV WDTR,A … CALL SUB1 CALL SUB2 … … … JMP MAIN |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |