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DA9313 Datasheet(PDF) 3 Page - Renesas Technology Corp

Part # DA9313
Description  High Efficiency Dual Cell Switched Capacitor Divider
PDF  55 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

DA9313 Datasheet(HTML) 3 Page - Renesas Technology Corp

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DA9313
High Efficiency Dual Cell Switched Capacitor Divider
Datasheet
Revision 3.6
16-Jun-2023
CFR0011-120-00
3 of 55
© 2023 Renesas Electronics
11.5 FAULT RECOVERY Mode ................................................................................................. 32
11.5.1
Input Under-Voltage............................................................................................. 32
11.5.2
Over-Temperature ............................................................................................... 33
11.5.3
PVC Current Limit................................................................................................ 33
11.5.4
PVC Start-Up Failure ........................................................................................... 33
11.6 VCORE Voltage Regulator ................................................................................................. 33
11.7 VDDIO Generation .............................................................................................................. 33
11.8 Internal Oscillator ................................................................................................................ 34
11.8.1
Internal Temperature Supervision ....................................................................... 34
12 Control Interface.......................................................................................................................... 35
12.1 I2C Communication ............................................................................................................. 35
12.2 I2C Control Bus Protocol ..................................................................................................... 36
13 Register Definitions .................................................................................................................... 38
14 Package Information ................................................................................................................... 50
14.1 Package Outline.................................................................................................................. 50
14.2 Moisture Sensitivity Level.................................................................................................... 51
14.3 WLCSP Handling ................................................................................................................ 51
14.4 Soldering Information .......................................................................................................... 51
15 Layout Guidelines ....................................................................................................................... 52
15.1 Suggested PCB Layout....................................................................................................... 52
15.2 RouteEasyTM Technology Chart........................................................................................ 52
16 Application Information .............................................................................................................. 53
16.1 Recommended Capacitors ................................................................................................. 53
17 Ordering Information .................................................................................................................. 53
Figures
Figure 1: Functional Block Diagram Standalone (I2C Not Connected) ................................................. 6
Figure 2: Functional Block Diagram Master/Slave Operation (I2C Not Connected).............................. 7
Figure 3: Functional Block Diagram Standalone (I2C Connected) ........................................................ 8
Figure 4: Functional Block Diagram Master/Slave Operation (I2C Connected) .................................... 9
Figure 5: Connection Diagram ............................................................................................................ 10
Figure 6: I2C Bus Timing ..................................................................................................................... 18
Figure 7: DA9313 Efficiency Automatic Mode Standalone ................................................................. 19
Figure 8: DA9313 Efficiency Fixed Frequency Mode Standalone....................................................... 19
Figure 9: DA9313 Output Voltage Drop Automatic Mode Standalone ................................................ 20
Figure 10: DA9313 Efficiency Automatic Mode Master/Slave............................................................. 20
Figure 11: DA9313 Efficiency Fixed Frequency Mode Master/Slave.................................................. 21
Figure 12: DA9313 Output Voltage Drop Automatic Mode Master/Slave ........................................... 21
Figure 13: Master Slave Timing in Automatic Frequency Mode ......................................................... 28
Figure 14: Operating Modes................................................................................................................ 30
Figure 15: Timing of I2C START and STOP Condition........................................................................ 36
Figure 16: I2C Byte Write (SDA Line) .................................................................................................. 36
Figure 17: I2C Byte Read (SDA Line) .................................................................................................. 36
Figure 18: I2C Page Read (SDA Line)................................................................................................. 37
Figure 19: I2C Page Write (SDA Line) ................................................................................................. 37
Figure 20: I2C Repeated Write (SDA Line).......................................................................................... 37
Figure 21: 43 WLCSP Package Outline Drawing................................................................................ 50
Figure 22: Suggested PCB Layout...................................................................................................... 52



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