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DA9313

High Efficiency Dual Cell Switched Capacitor Divider

Datasheet

Revision 3.6

16-Jun-2023

CFR0011-120-00

23 of 55

10.1.2.1

Master Operation

In master operation, GPIO_0 operates as the master slave interface (MS_IF) and provides the PVC

phase and enable/disable sequencing controls from the master to the slave. The start-up time is

extended to ensure that the slave device completes the cold boot to POWER_DOWN mode

sequence. Once the slave device has entered POWER_DOWN Mode, the master device enters

ACTIVE Mode and GPIO_0 is configured as a push-pull GPO for use as a master/slave interface

(MS_IF).

After the master device has entered ACTIVE mode, the master PVC triggers the slave PVC over the

MS_IF. GPIO_1 is functional in the master and can be configured via I2C.

NOTE

All master IOs, GPIO_1 and I2C, are supplied from VCORE in master mode not VDDIO. Thus I2C

communications are only possible if host I2C IOs also run from a 4 V supply, or are externally level shifted.

10.1.2.2

Slave Operation

When the device is operating as slave, it goes directly to POWER_DOWN Mode. There is no

communication to the slave (slave I2C lines are grounded) and the master controls the slave PVC

directly via MS_IF.

10.2 Interface Functions

DA9313 incorporates two general purpose input/output pins (GPIOs) and a dual mode onkey

(nONKEY) pin. Functions are assigned to the GPIOs via GPIO_CTRL and GPIO_CTRL_2 registers

and to nONKEY via NONKEY_MODE in the MODE_CTRL register.

Table 12: GPIO Configuration Overview

GPIO

Input Functionality

Output Functionality

Alternative Functionality

GPIO_1

GPI (Note 1)

PVC_EN

SLEEP_EN

PWC

GPO (Note 1)

nIRQ (Note 1)

Digital clock input (Ext_Clk_Inp)

SLAVE_ID

GPIO_0

GPI (Note 1)

PVC_EN

SLEEP_EN

PWC

GPO (Note 1)

nIRQ (Note 1)

Master/slave control interface (MS_IF)

Note 1

Valid when I2C is enabled

10.2.1

GPIOs

A power good (PG) indicator can be routed to either GPIO for host power up sequencing. The power

voltage converter enable, disable, and status field, PVC_EN, can be controlled via I2C or GPI. The

system controller can also be moved to a configurable SLEEP mode via I2C or GPI control.

NOTE

When DA9313 is in master/slave mode all GPI’s must be referenced to VCORE.

10.2.1.1

PVC Enable

The PVC can be disabled by an external PMIC (supplied from a different rail to the DA9313 PVC

output). This function is only provided in ACTIVE Mode and SLEEP Mode when VDDIO_EN bit is

high.

Either GPIO_1 or GPIO_0 can be configured as a PVC_EN pin via the GPIO_CTRL register,

GPIO_1_PIN and GPIO_0_PIN. The PVC_EN pin controls the PVC_EN bit in the PVC_CTRL

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