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DA9313

High Efficiency Dual Cell Switched Capacitor Divider

Datasheet

Revision 3.6

16-Jun-2023

CFR0011-120-00

22 of 55

10 Functional Description

DA9313 is a 2S compliant high-voltage power converter that generates an unregulated 1S output

voltage (VOUT) of half of VIN using a capacitive interleaved charge-pump divider. VOUT is a 10 A peak

current output in standalone configuration and 20 A peak current when driven from two DA9313

chips paired in master/slave configuration.

Host communication is not required for operation with OTP loading to configure DA9313 on start-up.

However, an I2C interface is available for host configuration of the register map if required. In

addition, the GPIOs can be configured as nIRQ for fault signaling and recovery. An internal LDO can

be enabled to supply VDDIO if required.

10.1 Start Up

DA9313 is OTP configured as a standalone or master/slave variant. The OTP variants are described

in a separate document.

10.1.1

Standalone Operation

DA9313 starts as a standalone device as default, when master/slave operation is not enabled

(MSTSLV_IF_EN bit is set to 0).

On battery insertion the full OTP content is loaded to the register map. DA9313 self-checks that the

system is stable and then proceeds to ACTIVE Mode or POWER_DOWN Mode as configured by the

AUTOBOOT bit.

POWER_DOWN mode is an ultra-low power state of the system implemented to extend the shelf life

of applications with a battery connected during shipping and before first user boot. DA9313 can be

brought from POWER_DOWN mode to ACTIVE mode via a user press of the nONKEY pin (the user,

or external IC, activated power on/off button). Once in ACTIVE mode the system will perform as

configured in either automatic or fixed frequency mode, see section 10.3.3.

To ensure minimal quiescent current requirements the oscillator is enabled only on demand, see

section 11.8. If necessary, the system can safely transfer clocking from the internal oscillator to an

external clock (within the specified operating frequency, see Table 6) via GPIO configuration, see

section 10.2.1.4.

DA9313 responds to critical faults by power cycling the device to protect circuitry, see section 11.5.

10.1.2

Master/Slave Operation

DA9313 starts in master/slave mode when MSTSLV_IF_EN bit is set to 1. GPIO_0 operates as the

master/slave interface (MS_IF) and is pulled down internally. On the master device, GPIO_1 should

not be driven externally. To configure the device as slave, GPIO_1 should be tied to VCORE of the

slave device, see Figure 2. DA9313 will remain in this state unless a cold boot is performed by

removing the battery.

The master takes control over the slave in such a way that the slave always operates in

POWER_DOWN Mode.

DA9313 Datasheet(PDF) 22 Page - Renesas Technology Corp

DA9313 Datasheet(HTML) 22 Page - Renesas Technology Corp

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