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AFE3010 Datasheet(PDF) 20 Page - Texas Instruments |
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AFE3010 Datasheet(HTML) 20 Page - Texas Instruments |
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20 / 33 page ![]() 20 AFE3010 SBFS042 – JUNE 2020 www.ti.com Product Folder Links: AFE3010 Submit Documentation Feedback Copyright © 2020, Texas Instruments Incorporated Table 5. Summary of Components in AFE3010 Typical Application (continued) COMPONENT DESIGNATOR COMPONENT VALUE COMPONENT RATINGS DESCRIPTION R8 10.5 kΩ 1%, 0.5 W Sets the level of fault current used in the periodic self-test when Q1 is turned on. The fault current should be greater than the trip point for successful detection and operation. The self-test will be hardest to pass when line connects to GFCI with reverse polarity and there is a small leakage current that is below the trip current. The worst-case power condition will be when a device cannot detect the self-test fault current and thus Q1 is on for a half-cycle of line. R9 1.5 kΩ 5%, 0.1 W Limits the output current of the ALARM driver. Using a higher R9 value will reduce supply current when ALARM is driving D3. R10 560 Ω 5%, 0.1 W Limits the output current of the SCR driver. R11 51 kΩ 5%, 1/3 W Limits the current into the SCR_TST pin when regulating to 20 V and sets internal biasing. The value of the resistor should not change from the recommendation when SEL = LOW. The lowest acceptable value is a 1% 49.9 kΩ. Given a 170-V peak line voltage, the average power rating required is calculated with [((170 V – 20 V)2) /R11] / [2 × SQRT(2)]. R12 1 MΩ 5%, 0.1 W Limits the current into PH pin. WARNING When evaluating this device, implement high-voltage safety precaution and procedures. 1. The first step in the design of a system with AFE3010 is to determine the correct transformer orientation and coil connections. The AFE3010 internal detection scheme requires the fault waveforms to have a specific polarity to the Hot-to-Neutral line voltage. The two rules the design must follow are: a. The amplifier output voltage (VOUT) must be approximately 180° out of phase with the Hot-Neutral line voltage when line voltage connects to a GFCI unit with normal polarity. Thus, when line is connected to system with reverse polarity, the VOUT signal must be in-phase with line voltage. The amplifier's polarity is determined by the value of C3, the connection of amplifier inputs (REF and FB) to the 1000-turn coil, and by the direction of the line wires through the transformer core. Refer to Figure 17 for the correct waveform. Note that normal line polarity means that the Hot and neutral nodes of the source are connected correctly to the Hot and Neutral input connectors of the system, respectively, which means the PH pin and D4 are also connected to Hot as shown in Figure 15. b. The N-G pulse on VOUT when there is a N-G fault must look like Figure 18. The N-G pulse measured on VOUT should first increase above 2.5 V and then decrease below 2.5 V. The second, downward pulse should be greater in amplitude and energy than the initial positive pulse. This rule should be true regardless of line polarity. N-G pulse polarity is determined by the connection of NG_OUT and GND pins to the 200-turn coil and by the polarity of the line wires through the transformer core. 2. Populate the board with the recommended values shown in Table 5. 3. Tune the amplifier's ground fault threshold (trip point). a. Set up the system with an adjustable Hot-to-ground (H-G) fault load and an ammeter in-series to measure the fault (or leakage) current. b. Adjust the fault load so that the ammeter reads < 3 mA RMS of fault current. c. Power off and then power on the system to reset any possible trips by the system. d. Slowly increase the fault current until the AFE3010 SCR driver is pulsed and trips the solenoid. Note the ammeter reading once the system trips. e. If the system trips too early (< 4.5 mA RMS), then disconnect the system from power and decrease R7. f. If the system trips too late (> 5.5 mA RMS), then disconnect the system from power and increase R7. 4. Tune the system's Neutral-to-ground (N-G) detection. a. Set up the system according to Figure 16. Note that this initial design process does not require testing N- G detection with H-G fault or load currents. |
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