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AFE3010 Datasheet(PDF) 3 Page - Texas Instruments

Part # AFE3010
Description  AFE3010 Ground Fault Circuit Interrupter (GFCI) With Self-Test and Neutral-Ground Fault Detection
PDF  33 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

AFE3010 Datasheet(HTML) 3 Page - Texas Instruments

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background image
1
SW_OPEN
12
PTT
2
VDD1
11
SEL
3
VDD2
10
PH
4
GND
9
SCR_TST
Not to scale
Thermal
Pad
3
AFE3010
www.ti.com
SBFS042 – JUNE 2020
Product Folder Links: AFE3010
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Copyright © 2020, Texas Instruments Incorporated
5 Pin Configuration and Functions
RGT Package
16-Pin VQFN
Top View
Pin Functions
PIN
I/O
DESCRIPTION
NO.
NAME
1
SW_OPEN
Input
Controls ALARM pin while asserted low. Refer to Table 3 for more details.
2
VDD1
Power
Power supply to the part from rectifying diode through series resistor. There is also a
decoupling cap at this pin.
3
VDD2
Power
Redundant power supply pin.
4
GND
Ground
Ground pin for the device.
5
NG_OUT
Output
Generates a pulse to start the Ground to Neutral fault detection scheme. Drives the
secondary winding of the 200:1 transformer through an AC-coupled capacitor. Leave this pin
floating if Neutral-GND fault detection is not needed.
6
SCR
Output
Current output pin that drives the SCR after a fault is detected.
7
ALARM
Output
Alarm/ LED driver output. Drives a 3-KHz signal that can be used to drive an LED or buzzer
to indicate that the self-test failed. Can be configured as secondary SCR driver when a 500-
KΩ resistor is connected between SEL pin and ground. Refer to Table 2 for more details.
8
FT
Output
Drives the base of a bipolar transistor to emulate fault event during self-test.
9
SCR_TST
I/O
Monitors the phase of the sine wave of HOT power line after the solenoid. Drives a weak
HIGH output during SCR self-test. Clamped to VDD through an internal diode.
10
PH
Input
Monitors the phase of the sine wave of HOT power line. Clamped to VDD through an internal
diode.
11
SEL
Input
Control pin to configure the device. Refer to Table 2 for more details.
12
PTT
Input
Active-low push-to-test pin. Starts self-test and fires SCR if self-test passes.
13
OUT
Output
Amplifier output node.
14
FB
Input
Amplifier inverting input.
15
REF
I/O
Amplifier non-inverting input. Typically 2.5 V derived from an internal 5-V regulator.
16
GND
Ground
Ground pin for the device.



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