BUF22821 datasheet(10/29 Pages) TI2

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BUF22821

SBOS399D

– JUNE 2007 – REVISED JULY 2011

www.ti.com

DATA RATES

OUTPUT VOLTAGE

The two-wire bus operates in one of three speed

Buffer output values are determined by the analog

modes:

supply voltage (VS) and the decimal value of the

binary input code used to program that buffer. The

•

Standard: allows a clock frequency of up to

value is calculated using Equation 1:

100kHz;

•

Fast: allows a clock frequency of up to 400kHz;

and

(1)

•

High-speed mode (also called Hs mode): allows a

The BUF22821 outputs are capable of a full-scale

clock frequency of up to 3.4MHz.

voltage

output

change

typically

μs—no

The BUF22821 is fully compatible with all three

intermediate steps are required.

modes. No special action is required to use the

device in Standard or Fast modes, but High-speed

UPDATING THE DAC OUTPUTS

mode must be activated. To activate High-speed

Because the BUF22821 features a double-buffered

mode, send a special address byte of 00001xxx, with

structure,

updating

the

digital-to-analog

SCL = 400kHz, following the START condition; where

converter (DAC) and/or the VCOM register is not the

xxx are bits unique to the Hs-capable master, which

same as updating the DAC and/or VCOM output

can be any value. This byte is called the Hs master

voltage. There are two methods for updating the

code. (Note that this is different from normal address

DAC/VCOM output voltages.

bytes

—the low bit does not indicate read/write

status.) The BUF22821 responds to the High-speed

Method 1: Method 1 is used when it is desirable to

command regardless of the value of these last three

have

the

DAC/VCOM

output

voltage

change

bits. The BUF22821 does not acknowledge this byte;

immediately after writing to a DAC register. For each

the

communication

protocol

prohibits

write transaction, the master sets data bit 15 to a '1'.

acknowledgement

the

master

code.

The DAC/VCOM output voltage update occurs after

receiving a master code, the BUF22821 switches on

receiving the 16th data bit for the currently-written

its Hs mode filters, and communicates at up to

3.4MHz. Additional high-speed transfers may be

initiated without resending the Hs mode byte by

Method 2: Method 2 is used when it is desirable to

generating a repeat START without a STOP. The

have all DAC/VCOM output voltages change at the

BUF22821 switches out of Hs mode with the next

same time. First, the master writes to the desired

STOP condition.

DAC/VCOM channels with data bit 15 a '0'. Then,

when writing the last desired DAC/VCOM channel, the

master sets data bit 15 to a '1'. All DAC/VCOM

GENERAL-CALL RESET AND POWER-UP

channels are updated at the same time after

The BUF22821 responds to a General-Call Reset,

receiving the 16th data bit.

which is an address byte of 00h (0000 0000) followed

by a data byte of 06h (0000 0110). The BUF22821

NONVOLATILE MEMORY

acknowledges

both

bytes.

Upon

receiving

General-Call Reset, the BUF22821 performs a full

BKSEL Pin

internal reset, as though it had been powered off and

then on. It always acknowledges the General-Call

The BUF22821 has 16x rewrite capability of the

address byte of 00h (0000 0000), but does not

nonvolatile memory. Additionally, the BUF22821 has

acknowledge any General-Call data bytes other than

the ability to store two distinct gamma curves in two

06h (0000 0110).

different nonvolatile memory banks, each of which

has 16x rewrite capability. One of the two available

When the BUF22821 powers up, it automatically

banks is selected using the external input pin,

performs a reset. As part of the reset, the BUF22821

BKSEL. When this pin is low, BANK0 is selected;

is configured for all outputs to change to the last

when this pin is high, BANK1 is selected.

programmed

nonvolatile

memory

values,

1000000000 if the nonvolatile memory values have

When the BKSEL pin changes state, the BUF22821

not been programmed.

acquires the last programmed DAC/VCOM values from

the nonvolatile memory associated with this newly

chosen bank. At power-up, the state of the BKSEL

pin determines which memory bank is selected.

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