BUF22821 datasheet(13/29 Pages) TI2

13 / 29 page

BUF22821

www.ti.com

SBOS399D

– JUNE 2007 – REVISED JULY 2011

Reading: DAC/VCOM/OTHER Register (volatile

7. Acknowledge after receiving each byte of data.

memory)

8. When all desired DACs have been read, send a

STOP or START condition on the bus.

Reading a register returns the data stored in that

DAC/VCOM/OTHER register.

Communication may be terminated by sending a

premature STOP or START condition on the bus, or

To read a single DAC/VCOM/OTHER register:

by not sending the acknowledge bit. The reading of

1. Send a START condition on the bus.

registers

DieID,

DieRev,

and

MaxBank

not

2. Send the device address and read/write bit =

supported in this mode of operation (they must be

LOW. The BUF22821 acknowledges this byte.

read using the single register read method).

3. Send the DAC/VCOM/OTHER pointer address

byte. Set bit D7 = 0 and D6 = 0; bits D5

–D0 are

Write: Nonvolatile Memory for the DAC Register

the DAC/VCOM/OTHER address. Only addresses

The BUF22821 is able to write to the nonvolatile

000000

–010111, 111100, 111101, and 111111

memory

single

DAC/VCOM

single

are valid and are acknowledged.

communication

transaction.

contrast

the

4. Send a START or STOP/START condition.

BUF20820, writing to multiple nonvolatile memory

5. Send the correct device address and read/write

words in a single transaction is not supported. Valid

bit = HIGH. The BUF22821 acknowledges this

DAC/VCOM pointer addresses begin with 000000

byte.

(which corresponds to OUT1) through 010111 (which

corresponds to OUT22).

6. Receive two bytes of data. They are for the

specified register. The most significant byte (bits

When programming the nonvolatile memory, the

D15

–D8) is received first; next is the least

analog supply voltage must be between 9V and 20V.

significant byte (bits D7

–D0). In the case of

Write commands are performed by setting the

DAC/VCOM channels, bits D15–D10 have no

read/write bit LOW.

meaning.

7. Acknowledge after receiving the first byte.

To write to a single nonvolatile register:

8. Send a STOP or START condition on the bus or

do not acknowledge the second byte to end the

1. Send a START condition on the bus.

read transaction.

2. Send the device address and read/write bit =

LOW. The BUF22821 acknowledges this byte.

Communication may be terminated by sending a

Only addresses 000000 to 010111 are valid and

premature STOP or START condition on the bus, or

are acknowledged. See Table 5 for DAC/VCOM

by not acknowledging.

addresses.

To read multiple registers:

3. Send a DAC/VCOM pointer address byte. Set bit

1. Send a START condition on the bus.

D7 = 0 and D6 = 0. Bits D5

–D0 are the

2. Send the device address and read/write bit =

DAC/VCOM address.

LOW. The BUF22821 acknowledges this byte.

4. Send two bytes of data for the nonvolatile register

3. Send either the OUT1 pointer address byte to

of the specified DAC/VCOM. Begin by sending the

start at the first DAC, or send the pointer address

most significant byte first (bits D15

–D8, of which

byte for whichever register is the first in the

only bits D9 and D8 are data bits, and bits

sequence of DACs/VCOMs to be read. The

D15

–D14 must be 01), followed by the least

BUF22821 begins with this DAC/VCOM and steps

significant byte (bits D7

–D0). The register is

through subsequent DACs/VCOMs in sequential

updated after receiving the second byte.

order.

5. Send a STOP condition on the bus.

4. Send a START or STOP/START condition on the

The BUF22821 acknowledges each data byte. If the

bus.

master terminates communication early by sending a

5. Send the correct device address and read/write

STOP or START condition on the bus, the specified

bit = HIGH. The BUF22821 acknowledges this

nonvolatile

not

updated.

Writing

byte.

nonvolatile register also updates the DAC/VCOM

6. Receive two bytes of data. They are for the

specified DAC/VCOM. The first received byte is the

most significant byte (bits D15

–D8, only bits D9

and

have

meaning),

the

least

significant byte (bits D7

–D0).

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