LM98519 datasheet(12/59 Pages) TI2

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OSR1/2

OSG1/2

OSB1/2

SAMPLE

HOLD

MCLK

DATA

Pixel(n)

Pixel(n+1)

SHD

HMC

MCH

LAT(2)

LAT(1)

Ch.1(n) Ch.2(n) Ch.1(n+1)

OD1

OD2

MCLK

Above timing relationships between SAMPLE, HOLD and MCLK are for AFEPHASE = 11.

For other AFEPHASE settings, the sampling timing can move earlier by ¼, ½, or ¾ pixel

period with respect to MCLK, but the latency as shown above will remain constant.

MCLK

SAMPLE

Pixel(n)

Pixel(n+1)

HOLD

OSR1/2

OSG1/2

OSB1/2

tSHD

tAD

tHMC

tMCH

tLAT(1)

tLAT(2)

tCL

tCH

tMCLK

DATA

Ch.1(n)

Ch.2(n)

Ch2.(n+1)

Ch1.(n+1)

Above timing relationships between SAMPLE, HOLD and MCLK are for AFEPHASE = 11.

For other AFEPHASE settings, the sampling timing can move earlier by ¼, ½ or ¾ pixel period with respect to

MCLK, but the latency as shown above will remain constant.

tOD

tAD

LM98519

SNAS425C – OCTOBER 2007 – REVISED OCTOBER 2014

www.ti.com

Figure 4. Output Latency and Timing – 6 Channel Mode – ADC Rate MCLK

Figure 5. Output Latency and Timing – 6 Channel Mode – Pixel Rate MCLK

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