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TAS3103ADBT Datasheet(PDF) 126 Page - Texas Instruments |
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TAS3103ADBT Datasheet(HTML) 126 Page - Texas Instruments |
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126 / 154 page ![]() 4−5 4.4.3 Serial Audio Port Slave-Mode Signals Over Recommended Operating Conditions (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNITS fLRCLK Frequency, LRCLK (Fs) 8 96 kHz tw(SCLKIN) Pulse duration, SCLKIN high See Note 2 0.25 HSCLKIN HSCLKIN 0.75 HSCLKIN ns fSCLKIN Frequency, SCLKIN See Note 1 32 Fs 25 MHz tcyc Cycle time, SCLKIN See Note 1 40 1/32 Fs ns tpd1 Propagation delay, SCLKIN falling edge to SDOUT 15.1 ns tsu1 Setup time, LRCLK to SCLKIN rising edge 6.6 ns th1 Hold time, LRCLK from SCLKIN rising edge 0 ns tsu2 Setup time, SDIN to SCLKIN rising edge 1.15 ns th2 Hold time, SDIN from SCLKIN rising edge 2.3 ns t Propagation delay, SCLKIN falling edge SCLKOUT2 = SCLKIN 12.4 ns tpd2 SCLKIN falling edge to SCLKOUT2 falling edge SCLKOUT2 < SCLKIN 12.5 ns NOTES: 1. Typical duty cycle is 50/50. 2. HSCLKIN = 1/2fSCLKIN SCLKIN LRCLK (Input) SDOUT1 SDOUT2 SDOUT3 SDIN1 SDIN2 SDIN3 SCLKOUT2 th1 tsu1 tpd1 tpd2 tsu2 th2 tcyc tw(SCLKIN) SDIN4 Figure 4−3. Serial Audio Port Slave-Mode Timing Waveforms |
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