6.4 Thermal Information

THERMAL METRIC(1)

ISO308x

UNIT

DW (SOIC)

16 PINS

RθJA

Junction-to-ambient thermal resistance

79.6

°C/W

RθJC(top)

Junction-to-case (top) thermal resistance

39.7

°C/W

RθJB

Junction-to-board thermal resistance

44.7

°C/W

ψJT

Junction-to-top characterization parameter

13.2

°C/W

ψJB

Junction-to-board characterization parameter

44.0

°C/W

RθJC(bot)

Junction-to-case (bottom) thermal resistance

—

°C/W

(1)

For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report.

6.5 Insulation Specifications

PARAMETER

TEST CONDITIONS

VALUE

UNIT

DW-16

CLR

External clearance(1)

Shortest terminal-to-terminal distance through air

8

mm

CPG

External creepage(1)

Shortest terminal-to-terminal distance across the

package surface

8

mm

DTI

Distance through the insulation

Minimum internal gap (internal clearance)

8

um

CTI

Comparative tracking index

DIN EN 60112 (VDE 0303-11); IEC 60112

>400

V

Material group

According to IEC 60664-1

II

Overvoltage category per IEC 60664-1

Rated mains voltage ≤ 150 VRMS

I-IV

Rated mains voltage ≤ 300 VRMS

I-III

DIN EN IEC 60747-17 (VDE 0884-17) (2)

VIORM

Maximum repetitive peak isolation voltage

AC voltage (bipolar)

560

VPK

VIOTM

Maximum transient isolation voltage

VTEST = VIOTM,

t = 60 s (qualification);

VTEST = 1.2 x VIOTM,

t= 1 s (100% production)

4000

VPK

qpd

Apparent charge(3)

Method b; At routine test (100% production)

Vini = 1.2 x VIOTM, tini = 1 s;

Vpd(m) = 1.5x VIORM, tm = 1 s

≤5

pC

CIO

Barrier capacitance, input to output(4)

VIO = 0.4 x sin (2πft), f = 1 MHz

2

pF

CI

Input capacitance to ground

VI = VCC/ 2 + 0.4×sin(2πft), f = 1 MHz, VCC = 5 V

2

pF

RIO

Isolation resistance(4)

VIO = 500 V, TA = 25°C

>1012

Ω

VIO = 500 V, TS = 150°C

>109

Pollution degree

2

Climatic category

40/125/21

UL 1577

VISO

Maximum withstanding isolation voltage

VTEST = VISO , t = 60 s (qualification),

VTEST = 1.2 x VISO , t = 1 s (100% production)

2500

VRMS

(1)

Creepage and clearance requirements should be applied according to the specific equipment isolation standards of an application.

Care should be taken to maintain the creepage and clearance distance of a board design to ensure that the mounting pads of

the isolator on the printed-circuit board do not reduce this distance. Creepage and clearance on a printed-circuit board become

equal in certain cases. Techniques such as inserting grooves and/or ribs on a printed-circuit board are used to help increase these

specifications.

(2)

This coupler is suitable for basic electrical insulation only within the safety ratings. Compliance with the safety ratings shall be ensured

by means of suitable protective circuits.

(3)

Apparent charge is electrical discharge caused by a partial discharge (pd).

ISO3080, ISO3082, ISO3086, ISO3088

SLOS581J – MAY 2008 – REVISED AUGUST 2023

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