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UCC33020 Datasheet(PDF) 9 Page - Texas Instruments |
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UCC33020 Datasheet(HTML) 9 Page - Texas Instruments |
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9 / 37 page ![]() 6.7 Insulation Specifications (continued) PARAMETER TEST CONDITIONS VALUE UNIT CTI Comparative tracking index DIN EN 60112 (VDE 0303-11); IEC 60112 > 600 V Material group According to IEC 60664-1 I Overvoltage category Rated mains voltage ≤ 300VRMS I-III Rated mains voltage ≤ 600VRMS I-II Rated mains voltage ≤ 1000VRMS I-I DIN EN IEC60747-17 (VDE 0884-17) (2) VIORM Maximum repetitive peak isolation voltage AC voltage (bipolar) 1159 VPK VIOWM Maximum working isolation voltage AC voltage (sine wave) Time dependent dielectric breakdown (TDDB) test 820 VRMS DC voltage 1000 VDC VIOTM Maximum transient isolation voltage VTEST = VIOTM, t = 60s (qualification) 4243 VPK VTEST = 1.2 × VIOTM , t = 1s (100%) production 5091 VPK VIMP Impulse Voltage (3) Tested in air, 1.2/50µs waveform per IEC 62368-1 5000 VPK VIOSM Maximum surge isolation voltage (4) Tested in oil (qualification test), 1.2/50µs waveform per IEC 62368-1. 6500 VPK qpd Apparent charge (5) Method a: After I/O safety test subgroup 2/3, Vini = VIOTM, tini = 60s; Vpd(m) = 1.2 × VIORM, tm = 10s ≤ 5 pC Method a: After environmental tests subgroup 1, Vini = VIOTM, tini = 60s; Vpd(m) = 1.3 × VIORM, tm = 10s ≤ 5 pC Method b1: At routine test (100% production), Vini = 1.2 x VIOTM, tini = 1s; Vpd(m) = 1.5 × VIORM, tm = 1s ≤ 5 pC CIO Barrier capacitance, input to output (6) VIO = 0.4 sin (2πft), f = 1MHz < 3 pF RIO Isolation resistance, input to output (6) VIO = 500V, TA = 25°C > 1012 Ω VIO = 500V, 100°C ≤ TA ≤ 125°C > 1011 Ω VIO = 500V at TS = 150°C > 109 Ω Pollution degree 2 Climatic category 40/125/21 UL 1577 VISO Withstand isolation voltage Withstand isolation voltage VTEST = VISO , t = 60s (qualification) VTEST = 1.2 × VISO , t=1s (100% production) 3000 VRMS (1) Creepage and clearance requirements should be applied according to the specific equipment isolation standards of an application. Care should be taken to maintain the creepage and clearance distance of a board design to ensure that the mounting pads of the isolator on the printed-circuit board do not reduce this distance. Creepage and clearance on a printed-circuit board become equal in certain cases. Techniques such as inserting grooves and/or ribs on a printed-circuit board are used to help increase these specifications. (2) This coupler is suitable for basic electrical insulation only within the maximum operating ratings. Compliance with the safety ratings shall be ensured by means of suitable protective circuits. (3) Testing is carried out in air to determine the surge immunity of the package. (4) Testing is carried out in oil to determine the intrinsic surge immunity of the isolation barrier (5) Apparent charge is electrical discharge caused by a partial discharge (pd). (6) All pins on each side of the barrier tied together creating a two-terminal device www.ti.com UCC33020 SLUSFK4A – FEBRUARY 2025 – REVISED MAY 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 9 Product Folder Links: UCC33020 |
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