ADS5560 datasheet(24/62 Pages) TI2

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f -InputFrequency-MHz

SFDR-dBc

M0049-04

f -InputFrequency-MHz

SNR-dBFS

82.5

83.5

M0048-04

83.5

81.5

84.5

82.5

81.5

FS − Sampling Frequency − MSPS

0.45

0.50

0.55

0.60

0.65

0.70

0.75

0.80

0.85

0.90

0.95

CMOS, No-Load Capacitance

CMOS, 5-pF Load Capacitance

CMOS, 10-pF Load Capacitance

LVDS

G044

fIN − Input Frequency − MHz

100

G043

Output Code

G040

RMS (LSB) = 1.429

VVCM − VCM Voltage − V

1.30

1.35

1.40

1.45

1.50

1.55

1.60

1.65

1.70

fIN = 5.01 MHz

External Reference Mode

G041

SNR

SFDR

ADS5560, ADS5562

SLWS207B – MAY 2008 – REVISED JANUARY 2016

www.ti.com

ADS5560 – 40 MSPS (continued)

Typical values are at 25°C, AVDD = DRVDD = 3.3 V, sampling frequency = Maximum Rated, sine wave input clock, 1.5-VPP

clock amplitude, 50% clock duty cycle, –1-dBFS differential analog input, internal reference mode, DDR LVDS interface,

default fine gain (1 dB), 32k Point FFT (unless otherwise noted)

Figure 37. Performance in External Reference Mode

Figure 36. Output Noise Histogram

6.15.3 Valid Up to Max Clock Rate (ADS5562 or ADS5560)

Typical values are at 25°C, AVDD = DRVDD = 3.3 V, sampling frequency = Maximum Rated, sine wave input clock, 1.5-VPP

clock amplitude, 50% clock duty cycle, –1-dBFS differential analog input, internal reference mode, DDR LVDS interface,

default fine gain (1 dB), 32k Point FFT (unless otherwise noted)

Figure 38. CMRR vs Common-Mode Frequency

Figure 39. Power Dissipation vs Sampling Frequency

Figure 40. SFDR Contour, 0-dB Gain

Figure 41. SNR Contour, 0-dB Gain

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ADS5560 Datasheet(PDF) 24 Page - Texas Instruments

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