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DAC53701 Datasheet(PDF) 36 Page - Texas Instruments |
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DAC53701 Datasheet(HTML) 36 Page - Texas Instruments |
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36 / 59 page  8.6.1 STATUS Register (address = D0h) [reset = 000Ch or 0014h] Figure 8-7. STATUS Register 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 NVM_CRC_ ALARM_ USER NVM_CRC_ ALARM_ INTERNAL NVM_ BUSY DAC_ UPDATE_ BUSY X DEVICE_ID VERSION_ID R-0h R-0h R-0h R-0h X-00h 10-bit: R-3h 8-bit: R-5h R-0h Table 8-19. STATUS Register Field Descriptions Bit Field Type Reset Description 15 NVM_CRC_ALARM_USER R 0 0 : No CRC error in user NVM bits 1: CRC error in user NVM bits 14 NVM_CRC_ALARM_INTERNAL R 0 0 : No CRC error in internal NVM 1: CRC error in internal NVM bits 13 NVM_BUSY R 0 0 : NVM write or load completed, Write to DAC registers allowed 1 : NVM write or load in progress, Write to DAC register map not allowed 12 DAC_UPDATE_BUSY R 0 0 : DAC outputs updated, Write to DAC registers allowed 1 : DAC outputs update in progress, Write to DAC register map not allowed 11 - 6 X X 00h Don't care 5 - 2 DEVICE_ID R DAC53701: 3h DAC43701: 5h Device identifier: DAC53701: 3h DAC43701: 5h 1 - 0 VERSION_ID R 0h Silicon version identifier. This field may have a different value based on the silicon revision. 8.6.2 GENERAL_CONFIG Register (address = D1h) [reset = 01F0h] Figure 8-8. GENERAL_CONFIG Register 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 FUNC_ CONFIG DEVICE_ LOCK EN_ PMBUS CODE_STEP SLEW_RATE DAC_PDN REF_EN DAC_SPAN R/ W-0h R/W-0h R/W-0h R/W-0h R/W-Fh R/W-2h R/W-0h R/W-0h Table 8-20. GENERAL_CONFIG Register Field Descriptions Bit Field Type Reset Description 15 - 14 FUNC_CONFIG R/W 00 00: Generates a triangle wave between MARGIN_HIGH (address 25h) code to MARGIN_LOW (address 26h) code with slope defined by SLEW_RATE and CODE_STEP bits. 01: Generates Saw-Tooth wave between MARGIN_HIGH (address 25h) code to MARGIN_LOW (address 26h) code, with rising slope defined by SLEW_RATE and CODE_STEP bits and immediate falling edge. 10: Generates Saw-Tooth wave between MARGIN_HIGH (address 25h) code to MARGIN_LOW (address 26h) code, with falling slope defined by SLEW_RATE and CODE_STEP bits and immediate rising edge. 11: Generates a square wave between MARGIN_HIGH (address 25h) code to MARGIN_LOW (address 26h) code with pulse high and low period defined by SLEW_RATE bits. 13 DEVICE_LOCK R/W 0 0: Device not locked 1: Device locked, the device locks all the registers. This bit can be overwritten (unlock device) by writing 0101 to the DEVICE_UNLOCK_CODE bits (address D3h) DAC53701, DAC43701 SLASEY5 – DECEMBER 2020 www.ti.com 36 Submit Document Feedback Copyright © 2020 Texas Instruments Incorporated Product Folder Links: DAC53701 DAC43701 |
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