DAC53701 datasheet(43/59 Pages) TI2

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DAC53701

LEDs

ICTRL

GPI

OFF

VDD

LADDER

OUT

VDD

Mechanical Switch

Coupled to

Appliance Door

Dim

Bright

LED

Driver

VCC

OUT

Figure 9-2. Fade-In Fade-Out with Switching LED Driver

9.2.1.1 Design Requirements

• Slew time: approximately, 1.5 s

• Bright LED current: 20 mA

• Dim LED current: 10 mA

9.2.1.2 Detailed Design Procedure

Choose a small VSET so that the power dissipation across RSET is minimum. Choose 1 V for the bright condition,

which results in an RSET of (1 V / 20 mA) = 50 Ω. Set the DACx3701 output span to 1.8 V. The output buffer of

the DAC is connected in a force-sense configuration to the MOSFET, as shown in Figure 9-1. This configuration

compensates the gate-source voltage drop caused by temperature, drain current, and ageing of the MOSFET.

Considering a typical gate-source voltage of 1.2 V and a power supply headroom of 200 mV, the VDD for the

DAC must be a minimum of (1 V + 1.2 V + 200 mV) = 2.4 V. Use a standard 3.3-V or 5-V power supply for the

DAC. A bipolar junction transistor (BJT) provides a much smaller base-emitter voltage drop, but a MOSFET has

better matching between the drain and source currents. Choose a BJT over the MOSFET in case there is a less

than 2.4-V supply voltage available for the DAC. Configure the MARGIN HIGH value to the code equivalent of 1

V; that is (1 V / 1.8 V) × 1024 = 569d or 0x239. The MARGIN LOW value should be the equivalent of the dim

LED current that is 10 mA, which corresponds to a DAC voltage of (10 mA × 50 Ω) = 500 mV. The code for

MARGN LOW is (500 mV / 1.8 V) × 1024 = 284d or 0x11C.

For control without the use of software, map the GPI to margin high-low operation as listed in Table 8-1. The

rising edge of the GPI maps to the MARGIN HIGH value of the 20-mA LED current, and the falling edge maps to

the MARGIN LOW value of the 10-mA LED current. When the DAC output is in the slewing condition, any

change in the GPI state changes the direction of the slew after the ongoing SLEW_RATE time, as shown in the

Application Curves section.

The slew time is given by (MARGIN_HIGH – MARGIN_LOW) × CODE_STEP × SLEW_RATE. For a 1.5-s slew

time, CODE_STEP × SLEW_RATE = 1.5 / (569 – 284) = ~ 5 ms. Choose the CODE_STEP as 1 LSB and

SLEW_RATE of 4.9152 ms. This configuration provides a slew time of 1.4 s. Adjust the MARGIN HIGH and

MARGIN LOW values for more granular control.

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DAC53701, DAC43701

SLASEY5 – DECEMBER 2020

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