ISO224 datasheet(3/37 Pages) TI2

3 / 37 page

VCAP

VDD2

OUTP

VDD1

OUTN

GND1

GND2

Not to scale

ISO224

www.ti.com

SBAS738A – JUNE 2018 – REVISED OCTOBER 2018

Product Folder Links: ISO224

Submit Documentation Feedback

5 Device Comparison Table

PARAMETER

ISO224B

ISO224A

Input offset voltage, VOS

±5 mV (max)

±50 mV (max)

Input offset drift, TCVOS

±15 µV/°C (max)

±60 µV/°C (max)

Input-referred noise

3 µV/

√Hz (typ)

4 µV/

√Hz (typ)

Gain error, EG

±0.3% (max)

±1% (max)

Gain error drift, TCEG

±35 ppm/°C (max)

±60 ppm/°C (max)

Nonlinearity

±0.01% (max)

±0.02% (max)

Output bandwidth, BW

275 kHz (typ)

185 kHz (typ)

Common-mode transient immunity, CMTI

80 kV/µs (typ)

30 kV/µs (typ)

IN to OUTP, OUTN signal delay (50% – 50%)

2.2 µs (typ)

2.8 µs (typ)

6 Pin Configuration and Functions

DWV Package

8-Pin SOIC

Top View

Pin Functions

I/O

DESCRIPTION

NO.

NAME

VCAP

—

Supply decoupling capacitor.

Connect a 0.22-µF capacitor between this pin and the high-side analog ground.

Analog input

VDD1

—

High-side power supply, 4.5 V to 18 V.

See the Power Supply Recommendations section for decoupling recommendations.

GND1

—

High-side analog ground

GND2

—

Low-side analog ground

OUTN

Inverting analog output

OUTP

Noninverting analog output

VDD2

—

Low-side power supply, 4.5 V to 5.5 V.

See the Power Supply Recommendations section for decoupling recommendations.

ISO224 Datasheet(PDF) 3 Page - Texas Instruments

ISO224 Datasheet(HTML) 3 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37

Datasheet Download

Link URL