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PCA9625 Datasheet(PDF) 6 Page - NXP Semiconductors |
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PCA9625 Datasheet(HTML) 6 Page - NXP Semiconductors |
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6 / 33 page ![]() PCA9625_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 15 January 2008 6 of 33 NXP Semiconductors PCA9625 16-bit Fm+ I2C-bus 100 mA 24 V LED driver 7. Functional description Refer to Figure 1 “Block diagram of PCA9625”. 7.1 Device addresses Following a START condition, the bus master must output the address of the slave it is accessing. There are a maximum of 128 possible programmable addresses using the 7 hardware address pins. Two of these addresses, Software Reset and LED All Call, cannot be used because their default power-up state is ON, leaving a maximum of 126 addresses. Using other reserved addresses, as well as any other Sub Call address, will reduce the total number of possible addresses even further. 7.1.1 Regular I2C-bus slave address The I2C-bus slave address of the PCA9625 is shown in Figure 3. To conserve power, no internal pull-up resistors are incorporated on the hardware selectable address pins and they must be pulled HIGH or LOW. Remark: Reserved I2C-bus addresses must be used with caution since they can interfere with: • ‘reserved for future use’ I2C-bus addresses (0000 011, 1111 1XX) • slave devices that use the 10-bit addressing scheme (1111 0XX) • slave devices that are designed to respond to the General Call address (0000 000) • High-speed mode (Hs-mode) master code (0000 1XX) VSS(DRV)FET 19 power supply FET driver supply ground LED4 20 O LED driver 4 LED5 21 O LED driver 5 LED6 22 O LED driver 6 LED7 23 O LED driver 7 VDD(DRV)FET 24 power supply supply voltage for FET driver VSS 25 power supply supply ground VDD(DRV)FET 26 power supply supply voltage for FET driver LED8 27 O LED driver 8 LED9 28 O LED driver 9 LED10 29 O LED driver 10 LED11 30 O LED driver 11 VSS(DRV)FET 31 power supply FET driver supply ground LED12 32 O LED driver 12 Table 2. Pin description for SO32 Symbol Pin Type Description |
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