PCA9625 datasheet(12/33 Pages) NXP

12 / 33 page

PCA9625_2

Product data sheet

Rev. 02 — 15 January 2008

12 of 33

NXP Semiconductors

PCA9625

16-bit Fm+ I2C-bus 100 mA 24 V LED driver

A 97 kHz ﬁxed frequency signal is used for each output. Duty cycle is controlled through

256 linear steps from 00h (0 % duty cycle = LED output off) to FFh

(99.6 % duty cycle = LED output at maximum brightness). Applicable to LED outputs

programmed with LDRx = 10 or 11 (LEDOUT0 to LEDOUT3 registers).

(1)

7.3.4 GRPPWM, group duty cycle control

When DMBLNK bit (MODE2 register) is programmed with logic 0, a 190 Hz ﬁxed

frequency signal is superimposed with the 97 kHz individual brightness control signal.

GRPPWM is then used as a global brightness control allowing the LED outputs to be

dimmed with the same value. The value in GRPFREQ is then a ‘Don’t care’.

General brightness for the 16 outputs is controlled through 256 linear steps from 00h

(0 % duty cycle = LED output off) to FFh (99.6 % duty cycle = maximum brightness).

Applicable to LED outputs programmed with LDRx = 11 (LEDOUT0 to LEDOUT3

registers).

When DMBLNK bit is programmed with logic 1, GRPPWM and GRPFREQ registers

deﬁne a global blinking pattern, where GRPFREQ contains the blinking period (from

24 Hz to 10.73 s) and GRPPWM the duty cycle (ON/OFF ratio in %).

(2)

7.3.5 GRPFREQ, group frequency

GRPFREQ is used to program the global blinking period when DMBLNK bit (MODE2

Applicable to LED outputs programmed with LDRx = 11 (LEDOUT0 to LEDOUT3

registers).

Blinking period is controlled through 256 linear steps from 00h (41 ms, frequency 24 Hz)

to FFh (10.73 s).

(3)

duty cycle

IDCx 7:0

[]

256

---------------------------

Table 8.

GRPPWM - Group brightness control register (address 12h) bit description

Legend: * default value

Address

Bit

Symbol

Access

Value

Description

12h

GRPPWM

7:0

GDC[7:0]

R/W

1111 1111

GRPPWM register

duty cycle

GDC 7:0

[]

256

---------------------------

Table 9.

GRPFREQ - Group Frequency register (address 13h) bit description

Legend: * default value.

Address

Bit

Symbol

Access

Value

Description

13h

GRPFREQ

7:0

GFRQ[7:0]

R/W

0000 0000*

GRPFREQ register

global blinking period

GFRQ 7:0

[] 1

---------------------------------------- s

()

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