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LMH2832

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SBOS709A – JULY 2016 – REVISED JULY 2016

Product Folder Links: LMH2832

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Copyright © 2016, Texas Instruments Incorporated

Electrical Characteristics (continued)

at TA = 25°C, VS+ = 5 V, Ri = 75 Ω, RL = 150 Ω, maximum gain (1:2-Ω ratio transformer plus 30-dB DVGA gain), f = 5 MHz to

300 MHz, VO converted to single-ended (SE) measurement with a transformer, and default current setting (unless otherwise

noted); upon power-up, gain is set to mid-range

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

TEST

LEVEL(1)

(3)

PSRR is defined with respect to a differential output.

(4)

The device power-down function can be controlled by the PDx pins or by the power-down register accessible from the SPI interface.

ANALOG INPUT CHARACTERISTICS

zin

Input resistance

f = dc, differential

135

150

165

Ω

A

Cin

Input capacitance

Differential

0.6

pF

C

Single-ended input resistance

f = dc

67.5

75

82.5

Ω

A

Single-ended input

capacitance

1.2

pF

C

VICM

Input common-mode voltage

Internally biased to mid-supply

–0.2

0.2

V

A

VIL

Low-level input voltage range

Differential gain shift < 1 dB

(VS–) + 1.5

V

C

VIH

High-level input voltage range

Differential gain shift < 1 dB

(VS+) – 1.5

V

C

ANALOG OUTPUT CHARACTERISTICS

zo

Output resistance

Differential

20

Ω

C

VOL

Low-level output voltage

range

VS = 5 V, GND = 0 V

1.15

1.25

V

A

VOH

High-level output voltage

range

VS = 5 V, GND = 0 V

3.75

3.85

V

A

VOM

Maximum output voltage

swing

TA = 25°C

5

5.4

V

A

TA = –40°C to +85°C

5.4

6.4

B

CMRR

Common-mode rejection ratio

56

dB

C

POWER SUPPLY

VS

Supply voltage

4.75

5.0

5.25

V

A

IQ

Quiescent current per channel

Default current, default bias setting

102

105

108

mA

A

Min current, lowest power setting

90

C

Max current, highest bias setting

108

C

±PSRR

Power-supply rejection ratio(3)

Gain = 30 dB

–48

dB

C

POWER-DOWN(4)

Power-down quiescent current

(per channel)

TA = 25°C

2.5

6

mA

A

TA = –40°C to +85°C

6.5

B

Power-down bias current

–2

–1

µA

A

Turn-on time delay

Time to VO = 90% of final value,

gain = 0 dB, VI = 2 V

55

ns

C

Turn-off time delay

Time to VO = 10% of original value,

gain = 0 dB, VI = 2 V

110

ns

C

Forward isolation in PD mode

f = 300 MHz

–67

dB

C

DIGITAL INPUTS/OUTPUTS

VIH

High-level input voltage

1.4

2

V

A

VIL

Low-level input voltage

–0.3

0.8

V

A

VOH

High-level output voltage

IOH = –100 µA

1.65

V

A

IOH = –2 mA

1.55

A

VOL

Low-level output voltage

IOL = 100 µA

0.1

V

A

IOL = 2 mA

0.2

A