L99DZ320 datasheet(55/146 Pages) STMICROELECTRONICS

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•

All outputs are turned off

•

All control registers are set to default values

•

Write operations to control registers are blocked until the fail-safe condition is cleared (see table below).

Only the following bits are not write protected:

–

CR18 (0x3F):

◦

TRIG

◦

CAN_ACT

–

CR17 (0x3E):

◦

Timer settings (bits 8…23)

–

CR14 (0x3B):

◦

HS15_x (bits 8…11)

◦

HS0_x (bits 12…15)

–

CR5 (0x32) to CR10 (0x37)

◦

PWM frequency and duty cycles

–

CR1 (0x26)

◦

TRIG

◦

V2_0

◦

V2_1

•

LIN transmitter remains on

•

Corresponding failure bits in status registers are set

•

FS bit (bit 0 global status byte) is set

In fail-safe mode the device returns to a fail-safe state until the fail-safe condition is removed and the fail-safe was

read by SPI. Depending on the root cause of the fail-safe operation, the actions to exit fail-safe mode are as

shown in the following table.

Table 52. Temporary failures conditions

Failure source

Failure condition

Diagnosis

Exit from fail-safe mode

Microcontroller

(oscillator)

Watchdog

Early write failure or

expired window

FS (global status byte) = 1

WDFAIL (SR8) = 1

WDFAIL_CNT_x (SR8) = n+1

TRIG = 1 during long open window

Read&Clear SR8

Short at turn on

FS (global status byte) = 1

V1FAIL = 1

FORCED SLEEP TSD2/V1SC (SR8) = 1

Wake-up

Read&Clear SR8

Undervoltage

FS (global status byte) = 1

V1UV = 1(1)

V1FAIL (SR7) = 1(2)

V1 > Vrth

Read&Clear SR8

Temperature

TJ > TSD2

FS (global status byte) =1

TW (SR7) = 1

TSD1 (SR8) = 1

TSD2 (SR8) = 1

TJ < TSD2

Read&Clear SR8

1. Bit SR8/V1UV is set for t > tuv1 (16 µs). Fail-safe bit GSR/FS is set only after tRD (NRESET low pulse).

2. If V1 < V1fail (for t > tv1fail). The fail-safe bit is located in the global status register.

3.7.2

Non-recoverable failures - entering force VBAT standby mode

If the fail-safe condition persists and all attempts to return to normal system operation fail, the L99DZ320 enters

the forced VBAT standby mode in order to prevent damage to the system. The forced VBAT standby mode can be

terminated by any wake-up source. The root cause of the forced VBAT standby mode is indicated in the SPI

status registers.

L99DZ320

Functional description

DS14235 - Rev 5

page 55/146

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