L99DZ320 datasheet(81/146 Pages) STMICROELECTRONICS

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The communication frame is finished with the rising edge of CSN. If a valid communication takes place (for

example a correct number of SCK cycles, access to a valid address), the requested operation according to the

operating code is performed (write or clear operation).

4.2.2

Communication protocol

SDI frame

The devices data in the frame consists of 32 bits (OpCode (2 bits) + address (6 bits) + data byte 3 + data byte 2 +

data byte 1).

The first two transmitted bits (MSB, MSB-1) contain the operation code that represents the instruction that is

performed. The following 6 bits (MSB-2 to MSB-7) represent the address on which the operation is performed.

The subsequent bytes contain the payload.

Figure 42. SDI frame

OC1 OC0

OPCODE

ADDRESS

DATA Byte 2

DATA Byte 1

MSB

LSB

time

DATA Byte 3

time

Operating code

The operating code is used to distinguish between different access modes to the registers of the slave device.

Table 57. Operation codes

OC1

OC0

Description

Write operation

Read operation

Read and clear operation

Read device information

A "Write operation" leads to a modification of the addressed data by the payload if a write access is allowed (for

example, control register, valid data). Besides this, a shift out of the registers content (data present at the

communication start) is performed.

A "Read operation" shifts out the data present in the addressed register at the communication start. The payload

data is ignored and internal data is not modified. In addition, a burst read can be performed.

A "Read and clear operation" leads to a clear of addressed status bits. The bits to be cleared are defined first by

address, second by payload bits set to ‘1’. Besides this, a shift out of the registers content (data present at the

communication start) is performed.

L99DZ320

Serial peripheral interface (SPI)

DS14235 - Rev 5

page 81/146

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