| Electronic Components Datasheet Search |
|
L99DZ320 Datasheet(PDF) 14 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
L99DZ320 Datasheet(HTML) 14 Page - STMicroelectronics |
|
14 / 146 page ![]() 2.4.4 Voltage regulator V1 The voltages are referred to ground, and currents are assumed positive, when the current flows into the pin. 4.5 < VS < 28 V, 4.5 V < VSREG < 28 V, TJ = -40 °C to 150 °C, unless otherwise specified. Table 10. Voltage regulator 1 Symbol Parameter Test condition Min. Typ. Max. Unit Item V1 Output voltage VSREG ≥ 5.6 V 5.0 V C.001 V110mA Output voltage tolerance (0 ... Icmp) ILOAD = 100 μA to Icmp, VSREG = 13.5 V -3 3 % C.003 V1high_acc Output voltage tolerance high accuracy mode ILOAD = Icmp to 100 mA, active mode, VSREG = 13.5 V -2 2 % C.004 V1250mA Output voltage tolerance (100 … 250 mA) ILOAD = 250 mA, VSREG = 13.5 V -3 3 % C.005 VDP1 Drop-out voltage ILOAD = 50 mA 0.2 0.4 V C.006 ILOAD = 100 mA 0.3 0.5 C.007 ILOAD = 150 mA 0.45 0.65 C.008 ICC1 Output current in active mode (to GND) Maximum continuous load current 250 mA C.009 ICCmax1 Short-circuit output current (to GND) Current limitation 340 600 900 mA C.010 Cload1(1) Load capacitor 1 Ceramic (±20%) 1(2) 2.2 10 µF C.011 tTSD V1 deactivation time after thermal shutdown Tested by scan 1.5 s C.012 ICMP_ris(3) Current comp. rising threshold (to GND) Rising current 6 12 21 mA C.013 ICMP_fal(3) Current comp. falling threshold (to GND) Falling current 5 10 18 mA C.014 ICMP_hys(3) Current comp. hysteresis 2 mA C.015 V1fail V1 fail threshold V1 forced 2 V C.019 tV1fail V1 fail filter time Tested by scan 6 13 20 µs C.020 tV1short V1 short filter time Tested by scan 2 4 5 ms C.021 tV1FS V1 fail-safe filter time Tested by scan 1.43 2 2.06 ms C.022 tV1off V1 deactivation time after 8 consecutive WD failures Tested by scan 200 270 ms C.023 1. Specified by design, not tested in production. 2. Nominal capacitor value required for stability of the regulator. Tested with 1 μF ceramic (±20%). Capacitor must be located close to the regulator output pin. A 2.2 μF capacitor value is recommended to minimize the DPI stress in the application. 3. In active mode, V1 regulator is switched to high accuracy mode. Below the ICMP threshold, regulator switches in any case to nominal accuracy mode (same behavior applies also in case of high current). L99DZ320 Electrical specifications DS14235 - Rev 5 page 14/146 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |