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TDA2SA Datasheet(PDF) 284 Page - Texas Instruments |
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TDA2SA Datasheet(HTML) 284 Page - Texas Instruments |
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284 / 427 page  284 TDA2SX, TDA2SG, TDA2SA TDA2HG, TDA2HV, TDA2HF, TDA2LF SPRS951F – DECEMBER 2015 – REVISED MAY 2019 www.ti.com Submit Documentation Feedback Product Folder Links: TDA2SX TDA2SG TDA2SA TDA2HG TDA2HV TDA2HF TDA2LF Timing Requirements and Switching Characteristics Copyright © 2015–2019, Texas Instruments Incorporated 7.17 Universal Serial Bus (USB) SuperSpeed USB DRD Subsystem has four instances in the device providing the following functions: • USB1: SuperSpeed (SS) USB 3.0 Dual-Role-Device (DRD) subsystem with integrated SS (USB3.0) PHY and HS/FS (USB2.0) PHY. • USB2: High-Speed (HS) USB 2.0 Dual-Role-Device (DRD) subsystem with integrated HS/FS PHY. • USB3: HS USB 2.0 Dual-Role-Device (DRD) subsystem with ULPI (SDR) interface to external HS/FS PHYs. • USB4: HS USB 2.0 Dual-Role-Device (DRD) subsystem with ULPI (SDR) interface to external HS/FS PHYs. NOTE For more information, see the SuperSpeed USB DRD section of the Device TRM. 7.17.1 USB1 DRD PHY The USB1 DRD interface supports the following applications: • USB2.0 High-Speed PHY port (1.8 V and 3.3 V): this asynchronous high-speed interface is compliant with the USB2.0 PHY standard with an internal transceiver (USB2.0 standard v2.0), for a maximum data rate of 480 Mbps. • USB3.0 Super-Speed PHY port (1.8 V): this asynchronous differential super-speed interface is compliant with the USB3.0 RX/TX PHY standard (USB3.0 standard v1.0) for a maximum data bit rate of 5Gbps. 7.17.2 USB2 PHY The USB2 interface supports the following applications: • USB2.0 High-Speed PHY port (1.8 V and 3.3 V): this asynchronous high-speed interface is compliant with the USB2.0 PHY standard with an internal transceiver (USB2.0 standard v2.0), for a maximum data rate of 480 Mbps. 7.17.3 USB3 and USB4 DRD ULPI—SDR—Slave Mode—12-pin Mode TheUSB3 and USB4 DRD interfaces support the following application: • USB ULPI port: this synchronous interface is compliant with the USB2.0 ULPI SDR standard (UTMI+ v1.22), for alternative off-chip USB2.0 PHY interface; that is, with external transceiver with a maximum frequency of 60 MHz (synchronous slave mode, SDR, 12-pin, 8-data-bit). NOTE The Universal Serial Bus k ULPI modules are also refered as USBk where k = 3, 4. Table 7-62, Table 7-63 and Figure 7-44 assume testing over the recommended operating conditions and electrical characteristic conditions. Table 7-62. Timing Requirements for ULPI SDR Slave Mode NO. PARAMETER DESCRIPTION MIN MAX UNIT US1 tc(clk) Cycle time, usb_ulpi_clk period 16.66 ns US5 tsu(ctrlV-clkH) Setup time, usb_ulpi_dir/usb_ulpi_nxt valid before usb_ulpi_clk rising edge 6.73 ns US6 th(clkH-ctrlV) Hold time, usb_ulpi_dir/usb_ulpi_nxt valid after usb_ulpi_clk rising edge -0.41 ns |
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