TDA2SA datasheet(379/427 Pages) TI2

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379

TDA2SX, TDA2SG, TDA2SA

TDA2HG, TDA2HV, TDA2HF, TDA2LF

www.ti.com

SPRS951F – DECEMBER 2015 – REVISED MAY 2019

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Product Folder Links: TDA2SX TDA2SG TDA2SA TDA2HG TDA2HV TDA2HF TDA2LF

Applications, Implementation, and Layout

8.5.6.2.2.3 Pair Length Matching

Each signal in the differential pair should be matched to within 5 mils of its matching differential signal.

Length matching should be done as close to the mismatch as possible.

8.5.6.3

LJCB_REFN/P Connections

A Common Refclk Rx Architecture is required to be used for the device PCIe interface. Specifically, two

modes of Common Refclk Rx Architecture are supported:

•

External REFCLK Mode: An common external 100MHz clock source is distributed to both the Device

and the link partner

•

Output REFCLK Mode: A 100MHz HCSL clock source is output by the device and used by the link

partner

In External REFCLK Mode, a high-quality, low-jitter, differential HCSL 100MHz clock source compliant to

the PCIe REFCLK AC Specifications should be provided on the Device’s ljcb_clkn / ljcb_clkp inputs.

Alternatively, an LVDS clock source can be used with the following additional requirements:

•

External AC coupling capacitors described in Table 8-28 should be populated at the ljcb_clkn /

ljcb_clkp inputs.

•

All termination requirements (ex. parallel 100ohm termination) from the clock source manufacturer

should be followed.

In Output REFCLK Mode, the 100MHz clock from the Device’s DPLL_PCIE_REF should be output on

the Device’s ljcb_clkn / ljcb_clkp pins and used as the HCSL REFCLK by the link partner. External near-

side termination to ground described in Table 8-29 is required on both of the ljcb_clkn / ljcb_clkp outputs

in this mode.

Table 8-28. LJCB_REFN/P Requirements in External LVDS REFCLK Mode

PARAMETER

MIN

TYP

MAX

UNIT

ljcb_clkn / ljcb_clkp AC coupling capacitor value

100

ljcb_clkn / ljcb_clkp AC coupling capacitor package size

0402

0603

EIA(1)(2)

(1) EIA LxW units, i.e., a 0402 is a 40x20 mils surface mount capacitor.

(2) The physical size of the capacitor should be as small as practical. Use the same size on both lines in each pair placed side by side.

Table 8-29. LJCB_REFN/P Requirements in Output REFCLK Mode

PARAMETER

MIN

TYP

MAX

UNIT

ljcb_clkn / ljcb_clkp near-side termination to ground value

47.5

52.5

Ohms

8.6

Clock Routing Guidelines

8.6.1

32-kHz Oscillator Routing

When designing the printed-circuit board:

•

Keep the crystal as close as possible to the crystal pins X1 and X2.

•

Keep the trace lengths short and small to reduce capacitor loading and prevent unwanted noise

pickup.

•

Place a guard ring around the crystal and tie the ring to ground to help isolate the crystal from

unwanted noise pickup.

•

Keep all signals out from beneath the crystal and the X1 and X2 pins to prevent noise coupling.

TDA2SA Datasheet(PDF) 379 Page - Texas Instruments

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