 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
TDA2SA Datasheet(PDF) 409 Page - Texas Instruments |
|
|
|||||||||||||||||||||||||||||
TDA2SA Datasheet(HTML) 409 Page - Texas Instruments |
|
|
409 / 427 page  A1 A2 Processor Address and Control Output Buffer DDR Address and Control Input Buffers AT VTT Address and Control Terminator Rtt A1 A2 Processor Differential Clock Output Buffer DDR Differential CK Input Buffer Routed as Differential Pair AT Rcp Clock Parallel Terminator A1 A2 AT Rcp Cac DDR_1V5 0.1 µF + – + – 409 TDA2SX, TDA2SG, TDA2SA TDA2HG, TDA2HV, TDA2HF, TDA2LF www.ti.com SPRS951F – DECEMBER 2015 – REVISED MAY 2019 Submit Documentation Feedback Product Folder Links: TDA2SX TDA2SG TDA2SA TDA2HG TDA2HV TDA2HF TDA2LF Applications, Implementation, and Layout Copyright © 2015–2019, Texas Instruments Incorporated Figure 8-74. CK Topology for One DDR3 Device Figure 8-75. ADDR_CTRL Topology for One DDR3 Device 8.7.3.15.3.2 CK and ADDR/CTRL Routing, One DDR3 Device Figure 8-76 shows the CK routing for one DDR3 device placed on the same side of the PCB. Figure 8-77 shows the corresponding ADDR_CTRL routing. |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
