TCC76X datasheet(86/259 Pages) ETC2

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TCC76x

Specification Rev. 0.07

February 23, 2005

32-bit RISC Microprocessor for Digital Media Player

INTERRUPT CONTROLLER

Preliminary

5-4

IRQ Interrupt Select Register (IRQSEL)

0x8000010C

Reserved

CIF

I2C

ADC

RDY

TC32 DMA

LCD CDIF

UBH

I2T

I2R

If each field is “1”, it means that the corresponding interrupt is considered as IRQ interrupt, if each field is ‘0’ it

means that its interrupt is considered as FIQ interrupt. Refer to chapter 3 for more information about IRQ / FIQ

interrupts.

External Interrupt Configuration Register (ICFG)

0x80000110

FE3

DTYPE3

FT3

FE2

DTYPE2

FT2

FE1

DTYPE1

FT1

FE0

DTYPE0

FT0

FE3~FE0

Filter Enable

Noise filter is enabled (in case of DTYPEn != 3)

Noise filter is disabled (in case of DTYPEn != 3)

If DTYPEn == 3, noise filter is always enabled, and this field sets which level generates the

interrupt. If it is set to 1, level high triggers interrupt, and if it is set to 0, level low triggers interrupt.

DTYPE3~0

Detection Type

Falling edge triggered external interrupt

Rising edge triggered external interrupt

Both edge triggered external interrupt

Level high / low triggered external interrupt

FEn field determines which level triggers the interrupt. If FEn == 1, level

high triggers the interrupt and FEn == 0, level low triggers the interrupt.

FT3~FT0

Filter Type

Reserved

Following is the summary of all above fields.

Table 5.2 Summary of External Interrupt Configuration

FEn, DTYPEn

Triggering

Noise Filter

000

Set falling edge triggered

Filter Enabled

001

Set rising edge triggered

Filter Enabled

010

Set both edge triggered

Filter Enabled

011

Set low level triggered

Filter Enabled

100

Set falling edge triggered

Filter disabled

101

Set rising edge triggered

Filter disabled

110

Set both edge triggered

Filter disabled

111

Set high level triggered

Filter Enabled

“011” and “111” are recommended to avoid conflicts caused by the different interpretation between

Wakup Event logic and Interrupt Generation logic. (Refer to “Wakeup Control Register” description).

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