MAX9879

Stereo Class D Audio Subsystem

with DirectDrive Headphone Amplifier

2

Maxim Integrated

ABSOLUTE MAXIMUM RATINGS

VDD, PVDDL, PVDDR to GND ..................................-0.3V to +6V

VDD, PVDDL to PVDDR .........................................-0.3V to +0.3V

VDD to PVDDL .......................................................-0.3V to +0.3V

VCCIO to GND...........................................................-0.3V to +4V

PGNDL, PGNDR, to GND......................................-0.3V to +0.3V

PGNDL to PGNDR.................................................-0.3V to +0.3V

VSS to GND...............................................................-6V to +0.3V

C1N to GND ................................................(VSS - 0.3V) to +0.3V

C1P to GND ...........................................-0.3V to (PVDD_ + 0.3V)

HPL, HPR to VSS (Note 1).............................-0.3V to the lower of

(VDD - VSS + 0.3V) or +9V

HPL, HPR to VDD (Note 2) .........................+0.3V to the higher of

(VSS - PVDD_ - 0.3V) or -9V

INA1, INA2, INB1, INB2, BIAS..................................-0.3V to +4V

SDA, SCL, SHDN......................................................-0.3V to +4V

All Other Pins to GND ............................-0.3V to (PVDD_ + 0.3V)

Continuous Current In/Out of PVDD_, PGND_, OUT_ ....±800mA

Continuous Current In/Out of HPR and HPL .....................140mA

Continuous Current In/Out of RXIN+ and RXIN- ...............150mA

Continuous Input Current VSS...........................................100mA

Continuous Input Current (All Other Pins) ........................±20mA

Duration of OUT_ Short Circuit

to PGND_ or PVDD_...............................................Continuous

Duration of Short Circuit

Between OUT_+ and OUT_- ..................................Continuous

Duration of HP_ Short Circuit to GND or PVDDL........Continuous

Continuous Power Dissipation (TA = +70°C)

5x6 UCSP Multilayer Board

(derate 16.5mW/°C above +70°C) .............................1250mW

Junction Temperature ......................................................+150°C

Operating Temperature Range ...........................-40°C to +85°C

Storage Temperature Range .............................-65°C to +150°C

Lead Temperature (soldering, 10s) .................................+300°C

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

Analog Supply Voltage Range

VDD,

PVDDR

PVDDL

Guaranteed by PSRR Test

2.7

5.5

V

Digital Supply Voltage Range

VCCIO

1.7

3.6

V

HP mode, RHP =

∞

5.6

9.0

Stereo SPK mode, RSPK =

∞

9.8

18

Mono SPK mode, RSPK =

∞

6.6

10

Quiescent Current

IDD

Stereo SPK + HP mode, RHP= RSPK =

∞

13.2

24

mA

Software shutdown

5

10

Shutdown Current

ISHDN

ISHDN = IDD + IPVDDR

+ IPVDDL + ICC;

TA = +25°C

Hardware shutdown

0.1

1

µA

Turn-On Time

tON

Time from shutdown or power-on to full

operation

10

ms

TA = +25°C, preamp = 0dB or +5.5dB

11

21

31

Input Resistance

RIN

TA = +25°C, preamp = +20dB

3

5.5

8

k

Ω

Preamp = 0dB

2.3

Preamp = +5.5dB

1.2

Headphone

amplifier

path

Preamp = +20dB

0.23

Preamp = 0dB

1.2

Preamp = +5.5dB

0.64

Maximum Input Signal Swing

Speaker

amplifier path

Preamp = +20dB

0.12

VP-P

ELECTRICAL CHARACTERISTICS

(VDD = VPVDDL = VPVDDR = 3.7V, VCCIO = 1.8V, VGND = VPGNDL = VPGNDR = 0. Single-ended inputs, preamp = 0, volume controls =

0dB, BYPASS = 0, SHDN = 1. Speaker loads connected between OUT_+ and OUT_-. Headphone loads connected from HPL or HPR to

GND. RSPK = ∞, RHP = ∞. C1 = C2 = CBIAS = 1µF. TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.)

(Notes 3, 4)

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional

operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to

absolute maximum rating conditions for extended periods may affect device reliability.

Note 1: HPR and HPL should be limited to no more than 9V above VSS, or above PVDD + 0.3V, whichever limits first.

Note 2: HPR and HPL should be limited to no more than 9V below PVDD, or below VSS - 0.3V, whichever limits first.